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authorColin Ian King <colin.king@canonical.com>2021-04-26 13:55:14 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-06-03 10:00:34 +0300
commit604c654323fa45d3f78502beb054d97a65c28349 (patch)
tree33a4782ad54fc1dabd96934afcc2401402ee11bd /drivers/tty
parentd007150b4e15bfcb8d36cfd88a5645d42e44d383 (diff)
downloadlinux-604c654323fa45d3f78502beb054d97a65c28349.tar.xz
serial: tegra: Fix a mask operation that is always true
commit 3ddb4ce1e6e3bd112778ab93bbd9092f23a878ec upstream. Currently the expression lsr | UART_LSR_TEMT is always true and this seems suspect. I believe the intent was to mask lsr with UART_LSR_TEMT to check that bit, so the expression should be using the & operator instead. Fix this. Fixes: b9c2470fb150 ("serial: tegra: flush the RX fifo on frame error") Signed-off-by: Colin Ian King <colin.king@canonical.com> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20210426105514.23268-1-colin.king@canonical.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/serial-tegra.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index bd13014a1c53..fdce1a799592 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -333,7 +333,7 @@ static void tegra_uart_fifo_reset(struct tegra_uart_port *tup, u8 fcr_bits)
do {
lsr = tegra_uart_read(tup, UART_LSR);
- if ((lsr | UART_LSR_TEMT) && !(lsr & UART_LSR_DR))
+ if ((lsr & UART_LSR_TEMT) && !(lsr & UART_LSR_DR))
break;
udelay(1);
} while (--tmout);