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authorUlrich Hecht <ulrich.hecht+renesas@gmail.com>2017-02-02 20:10:14 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-02-03 12:14:10 +0300
commit54e14ae2f3e82b327853e40afa9382a984a56742 (patch)
tree2d5338eab4451ba44fdbb460642a9ebffe4298f4 /drivers/tty/serial/sh-sci.h
parent0832a462029538bab8dead15d12fa63f201a675a (diff)
downloadlinux-54e14ae2f3e82b327853e40afa9382a984a56742.tar.xz
serial: sh-sci: add FIFO trigger bits
Defines the bits controlling FIFO thresholds, adds the additional HSCIF registers to the register map. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/sh-sci.h')
-rw-r--r--drivers/tty/serial/sh-sci.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index 08073f0db732..30b6d67867e7 100644
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -29,6 +29,8 @@ enum {
SCPDR, /* Serial Port Data Register */
SCDL, /* BRG Frequency Division Register */
SCCKS, /* BRG Clock Select Register */
+ HSRTRGR, /* Rx FIFO Data Count Trigger Register */
+ HSTTRGR, /* Tx FIFO Data Count Trigger Register */
SCIx_NR_REGS,
};
@@ -99,6 +101,10 @@ enum {
#define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK))
/* SCFCR (FIFO Control Register) */
+#define SCFCR_RTRG1 BIT(7) /* Receive FIFO Data Count Trigger */
+#define SCFCR_RTRG0 BIT(6)
+#define SCFCR_TTRG1 BIT(5) /* Transmit FIFO Data Count Trigger */
+#define SCFCR_TTRG0 BIT(4)
#define SCFCR_MCE BIT(3) /* Modem Control Enable */
#define SCFCR_TFRST BIT(2) /* Transmit FIFO Data Register Reset */
#define SCFCR_RFRST BIT(1) /* Receive FIFO Data Register Reset */