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| author | Huang Shijie <shijie8@gmail.com> | 2012-09-07 06:38:40 +0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-06 20:19:50 +0400 |
| commit | 851b714b29db0e394c293170e714f90a778060ad (patch) | |
| tree | 6919798d9e68d94038af5c2a24a7ffd1d7af8209 /drivers/tty/serial/sccnxp.c | |
| parent | 37cd0c994fc8ecbfb258c4be2442d9d6f31447ea (diff) | |
| download | linux-851b714b29db0e394c293170e714f90a778060ad.tar.xz | |
serial: mxs-auart: fix the wrong setting order
After set the AUART_CTRL0_CLKGATE, the UART will gate all the clocks off.
So the following line will not take effect.
................................................................
writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,
u->membase + AUART_INTR_CLR);
................................................................
To fix this issue, the patch moves this gate-off line to
the end of setting registers.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/sccnxp.c')
0 files changed, 0 insertions, 0 deletions