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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2021-10-27 13:29:09 +0300 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2022-02-02 13:56:38 +0300 |
| commit | 3eddfc121f90e174253031594b354e5764f8a318 (patch) | |
| tree | d3f74e32190c4ca72a8fd88075c186c110a764ce /drivers/thunderbolt/tb_regs.h | |
| parent | 97486e981ffb865f8845af3c24d5fb19f1ea37e8 (diff) | |
| download | linux-3eddfc121f90e174253031594b354e5764f8a318.tar.xz | |
thunderbolt: Disable LTTPR on Intel Titan Ridge
Intel Titan Ridge does not disable AUX timers when it gets SET_CONFIG
with SET_LTTPR_MODE set which makes DP tunneling to fail. For this
reason disable LTTPR on Titan Ridge device side.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
| -rw-r--r-- | drivers/thunderbolt/tb_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index a74f4878d3e7..9693a6ec5950 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -389,6 +389,7 @@ struct tb_regs_port_header { #define DP_COMMON_CAP_1_LANE 0x0 #define DP_COMMON_CAP_2_LANES 0x1 #define DP_COMMON_CAP_4_LANES 0x2 +#define DP_COMMON_CAP_LTTPR_NS BIT(27) #define DP_COMMON_CAP_DPRX_DONE BIT(31) /* PCIe adapter registers */ |