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authorMika Westerberg <mika.westerberg@linux.intel.com>2019-02-15 19:18:47 +0300
committerMika Westerberg <mika.westerberg@linux.intel.com>2019-11-02 12:13:31 +0300
commitde718ac7b6aefa594d5d95881882bc68ec3b83b6 (patch)
treebd607d003f980dd6fa60769f775f6e11d8660f7a /drivers/thunderbolt/tb_regs.h
parent7bffd97eb7ab8a67de718bdd626e9fad27ee61b9 (diff)
downloadlinux-de718ac7b6aefa594d5d95881882bc68ec3b83b6.tar.xz
thunderbolt: Add Display Port CM handshake for Titan Ridge devices
Titan Ridge needs an additional connection manager handshake in order to do proper Display Port tunneling so implement it here. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
-rw-r--r--drivers/thunderbolt/tb_regs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index 3a39490a954b..8d11b4a2d552 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -252,6 +252,9 @@ struct tb_regs_port_header {
#define ADP_DP_CS_3_HDPC BIT(9)
#define DP_LOCAL_CAP 0x04
#define DP_REMOTE_CAP 0x05
+#define DP_STATUS_CTRL 0x06
+#define DP_STATUS_CTRL_CMHS BIT(25)
+#define DP_STATUS_CTRL_UF BIT(26)
/* PCIe adapter registers */
#define ADP_PCIE_CS_0 0x00