diff options
| author | Mark Brown <broonie@kernel.org> | 2023-03-06 16:30:40 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-03-06 16:30:40 +0300 |
| commit | b36cecf247157c36aa8f41b5783122820b2c5456 (patch) | |
| tree | f40fc781ae53d04aeee9addc55d3e3e0b0c5e849 /drivers/spi | |
| parent | 1ef5decf693bc45e801d00dc740d584dbd54467a (diff) | |
| parent | 47fef94afeae2a125607b6b45145594713471320 (diff) | |
| download | linux-b36cecf247157c36aa8f41b5783122820b2c5456.tar.xz | |
Add Quad SPI driver for StarFive JH7110 SoC
Merge series from William Qiu <william.qiu@starfivetech.com>:
This patchset adds initial rudimentary support for the StarFive
Quad SPI controller driver. And this driver will be used in
StarFive's VisionFive 2 board.The first patch constrain
minItems/maxItems of resets for JH7110 QSPI and Patch 2 adds
support for StarFive JH7110 QSPI.
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/spi/spi-cadence-quadspi.c | 21 |
2 files changed, 21 insertions, 2 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 78645f8ba181..36a18c215163 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -239,7 +239,7 @@ config SPI_CADENCE config SPI_CADENCE_QUADSPI tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST) + depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST) help Enable support for the Cadence Quad SPI Flash controller. diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 64b6a460d739..c789fa9e2177 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1615,7 +1615,7 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) static int cqspi_probe(struct platform_device *pdev) { const struct cqspi_driver_platdata *ddata; - struct reset_control *rstc, *rstc_ocp; + struct reset_control *rstc, *rstc_ocp, *rstc_ref; struct device *dev = &pdev->dev; struct spi_master *master; struct resource *res_ahb; @@ -1705,6 +1705,17 @@ static int cqspi_probe(struct platform_device *pdev) goto probe_reset_failed; } + if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) { + rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref"); + if (IS_ERR(rstc_ref)) { + ret = PTR_ERR(rstc_ref); + dev_err(dev, "Cannot get QSPI REF reset.\n"); + goto probe_reset_failed; + } + reset_control_assert(rstc_ref); + reset_control_deassert(rstc_ref); + } + reset_control_assert(rstc); reset_control_deassert(rstc); @@ -1859,6 +1870,10 @@ static const struct cqspi_driver_platdata versal_ospi = { .get_dma_status = cqspi_get_versal_dma_status, }; +static const struct cqspi_driver_platdata jh7110_qspi = { + .quirks = CQSPI_DISABLE_DAC_MODE, +}; + static const struct of_device_id cqspi_dt_ids[] = { { .compatible = "cdns,qspi-nor", @@ -1884,6 +1899,10 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "intel,socfpga-qspi", .data = &socfpga_qspi, }, + { + .compatible = "starfive,jh7110-qspi", + .data = &jh7110_qspi, + }, { /* end of table */ } }; |