diff options
| author | Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> | 2015-01-23 19:08:34 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-01-26 22:23:35 +0300 |
| commit | 0240f94516964db00d0fc1d1e676f3c273710e17 (patch) | |
| tree | 7d2031b153c6c9d48c66a655fd57bfe9614e9e53 /drivers/spi/spi-xilinx.c | |
| parent | bca690db90b832a58756b30d5ff41e65881216f9 (diff) | |
| download | linux-0240f94516964db00d0fc1d1e676f3c273710e17.tar.xz | |
spi/xilinx: Support for spi mode LOOP
Hardware supports LOOP mode. Support it also in the driver.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-xilinx.c')
| -rw-r--r-- | drivers/spi/spi-xilinx.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index d4edeeeabbc3..e1d9a2003ae6 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c @@ -35,7 +35,7 @@ #define XSPI_CR_CPOL 0x08 #define XSPI_CR_CPHA 0x10 #define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL | \ - XSPI_CR_LSB_FIRST) + XSPI_CR_LSB_FIRST | XSPI_CR_LOOP) #define XSPI_CR_TXFIFO_RESET 0x20 #define XSPI_CR_RXFIFO_RESET 0x40 #define XSPI_CR_MANUAL_SSELECT 0x80 @@ -197,6 +197,8 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on) cr |= XSPI_CR_CPOL; if (spi->mode & SPI_LSB_FIRST) cr |= XSPI_CR_LSB_FIRST; + if (spi->mode & SPI_LOOP) + cr |= XSPI_CR_LOOP; xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); /* We do not check spi->max_speed_hz here as the SPI clock @@ -356,7 +358,7 @@ static int xilinx_spi_probe(struct platform_device *pdev) return -ENODEV; /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_LOOP; xspi = spi_master_get_devdata(master); xspi->bitbang.master = master; |