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| author | Andrew Bresticker <abrestic@chromium.org> | 2015-04-07 00:29:03 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-04-07 14:19:10 +0300 |
| commit | 8543d0e72d4340001d756bd89bee70ce239e1ea5 (patch) | |
| tree | d1541d6533e9ad0dafedc68787d46c38e8681009 /drivers/spi/spi-tegra20-sflash.c | |
| parent | c517d838eb7d07bbe9507871fab3931deccff539 (diff) | |
| download | linux-8543d0e72d4340001d756bd89bee70ce239e1ea5.tar.xz | |
spi: img-spfi: Limit bit clock to 1/4th of input clock
Although the SPFI BITCLK divider supports a value of up to 255, only
values up to 128 are usable. This results in a maximum possible bit
clock rate of 1/4th the input clock rate.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-tegra20-sflash.c')
0 files changed, 0 insertions, 0 deletions