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authorAxel Lin <axel.lin@ingics.com>2015-01-05 04:32:56 +0300
committerMark Brown <broonie@kernel.org>2015-01-05 22:04:39 +0300
commitd297933cc7fcfbaaf2d37570baac73287bf0357d (patch)
treee4a7d2235b2bce007dbd11f3e8e7c2d019a7d8b6 /drivers/spi/spi-clps711x.c
parent97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff)
downloadlinux-d297933cc7fcfbaaf2d37570baac73287bf0357d.tar.xz
spi: dw: Fix detecting FIFO depth
Current code tries to find the highest valid fifo depth by checking the value it wrote to DW_SPI_TXFLTR. There are a few problems in current code: 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest register write fails so the latest valid value should be fifo - 1. 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary to test fifo == 257. In the case fifo is 257, it means the latest valid setting is fifo = 256. So after the for loop iteration, we should check fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. This patch fixes above issues. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-and-tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/spi/spi-clps711x.c')
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