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| author | Dhaval Shah <dhaval.shah@xilinx.com> | 2017-12-21 21:33:06 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-01-08 15:42:47 +0300 |
| commit | cee8113a295acfc4cd25728d7c3d44e6bc3bbff9 (patch) | |
| tree | 9f5bf6d034f9120fb26e46593fbab85dbf4cc8d0 /drivers/soc/xilinx/Kconfig | |
| parent | b7511552f920c8c273912353a8c8bf65e8f84fdc (diff) | |
| download | linux-cee8113a295acfc4cd25728d7c3d44e6bc3bbff9.tar.xz | |
soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.
Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/soc/xilinx/Kconfig')
| -rw-r--r-- | drivers/soc/xilinx/Kconfig | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/soc/xilinx/Kconfig b/drivers/soc/xilinx/Kconfig index ffaaa2f42c7e..266b50ffe349 100644 --- a/drivers/soc/xilinx/Kconfig +++ b/drivers/soc/xilinx/Kconfig @@ -1,4 +1,19 @@ # SPDX-License-Identifier: GPL-2.0 menu "Xilinx SoC drivers" +config XILINX_VCU + tristate "Xilinx VCU logicoreIP Init" + help + Provides the driver to enable and disable the isolation between the + processing system and programmable logic part by using the logicoreIP + register set. This driver also configures the frequency based on the + clock information from the logicoreIP register set. + + If you say yes here you get support for the logicoreIP. + + If unsure, say N. + + To compile this driver as a module, choose M here: the + module will be called xlnx_vcu. + endmenu |