diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-09 04:55:21 +0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-09 04:55:21 +0400 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /drivers/serial/ucc_uart.c | |
| parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
| parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) | |
| download | linux-bbb20089a3275a19e475dbc21320c3742e3ca423.tar.xz | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'drivers/serial/ucc_uart.c')
| -rw-r--r-- | drivers/serial/ucc_uart.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c index 7de66c06b05d..e945e780b5c9 100644 --- a/drivers/serial/ucc_uart.c +++ b/drivers/serial/ucc_uart.c @@ -681,22 +681,27 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) out_be16(&uccup->rccm, 0xc0ff); /* Configure the GUMR registers for UART */ - if (soft_uart) + if (soft_uart) { /* Soft-UART requires a 1X multiplier for TX */ clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | UCC_SLOW_GUMR_L_RDCR_MASK, UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 | UCC_SLOW_GUMR_L_RDCR_16); - else + + clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW, + UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX); + } else { clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | UCC_SLOW_GUMR_L_RDCR_MASK, UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 | UCC_SLOW_GUMR_L_RDCR_16); - clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW, - UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX); + clrsetbits_be32(&uccp->gumr_h, + UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX, + UCC_SLOW_GUMR_H_RFW); + } #ifdef LOOPBACK clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK, @@ -706,7 +711,7 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) UCC_SLOW_GUMR_H_CDS); #endif - /* Enable rx interrupts and clear all pending events. */ + /* Disable rx interrupts and clear all pending events. */ out_be16(&uccp->uccm, 0); out_be16(&uccp->ucce, 0xffff); out_be16(&uccp->udsr, 0x7e7e); @@ -765,6 +770,10 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num); qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock, QE_CR_PROTOCOL_UNSPECIFIED, 0); + } else { + cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num); + qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock, + QE_CR_PROTOCOL_UART, 0); } } |