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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-13 03:00:54 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-13 03:00:54 +0300 |
commit | dca1d9f6d7ae428c193f32bd3e9a4ca13176648b (patch) | |
tree | 02de8c3503c1c811754423d2fa3f3b4978044f6e /drivers/serial/sh-sci.h | |
parent | 9ff99339447de403a46be5e3f23d0c794d540b06 (diff) | |
parent | 91e013827c0bcbb187ecf02213c5446b6f62d445 (diff) | |
download | linux-dca1d9f6d7ae428c193f32bd3e9a4ca13176648b.tar.xz |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
ARM: S3C2443: Remove #if 0 for clk_mpll
ARM: S3C2443: Update notes on MPLLREF clock
ARM: S3C2443: Further clksrc-clk conversions
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
USB: Fix s3c-hsotg build following Samsung platform header moves
ARM: S3C64XX: Reintroduce unconditional build of audio device
ARM: 5961/1: ux500: fix CLKRST addresses
ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
ASoC: Fix S3C64xx IIS driver for Samsung header reorg
ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
[ARM] pxa: fix typo in mxm8x10.h
[ARM] pxa/raumfeld: set GPIO drive bits for LED pins
[ARM] pxa/zeus: Add support for mcp2515 CAN bus
[ARM] pxa/zeus: Add support for onboard max6369 watchdog
[ARM] pxa/zeus: Add Eurotech as the manufacturer
[ARM] pxa/zeus: Correct the USB host initialisation flags
[ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
[ARM] pxa: refactor uncompress.h for non-PXA uarts
[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
...
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r-- | drivers/serial/sh-sci.h | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index f7d2589926d2..fad67d33b0bd 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -30,7 +30,8 @@ */ # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define PORT_PTCR 0xA405011EUL # define PORT_PVCR 0xA4050122UL @@ -228,7 +229,8 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) # define SCIF_ORER 0x0200 # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) # define SCIF_RFDC_MASK 0x007f @@ -261,7 +263,8 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) @@ -356,7 +359,7 @@ SCI_OUT(sci_size, sci_offset, value); \ } -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE) #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ @@ -366,7 +369,8 @@ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) #define SCIF_FNS(name, scif_offset, scif_size) \ CPU_SCIF_FNS(name, scif_offset, scif_size) #else @@ -401,7 +405,8 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) @@ -413,7 +418,7 @@ SCIF_FNS(SCFCR, 0x18, 16) SCIF_FNS(SCFDR, 0x1c, 16) SCIF_FNS(SCxTDR, 0x20, 8) SCIF_FNS(SCxRDR, 0x24, 8) -SCIF_FNS(SCLSR, 0x24, 16) +SCIF_FNS(SCLSR, 0x00, 0) #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ defined(CONFIG_CPU_SUBTYPE_SH7724) SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) @@ -583,7 +588,8 @@ static inline int sci_rxd_in(struct uart_port *port) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_ARCH_SHMOBILE) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ defined(CONFIG_CPU_SUBTYPE_SH7724) |