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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2021-05-10 17:06:40 +0300
committerThierry Reding <thierry.reding@gmail.com>2021-05-25 19:19:15 +0300
commite9fdf122cf3442573d811c0cb664d6b5c30b7780 (patch)
tree613649f025aa137c413777da9ae637331c9070c0 /drivers/pwm/pwm-stm32-lp.c
parent69230cfac3d02c1b8d78aa7bdb29a1710147d49b (diff)
downloadlinux-e9fdf122cf3442573d811c0cb664d6b5c30b7780.tar.xz
pwm: Simplify all drivers with explicit of_pwm_n_cells = 3
With the previous commit there is no need for the lowlevel driver any more to specify it it uses two or three cells. So simplify accordingly. The only non-trival change affects the pwm-rockchip driver: It used to only support three cells if the hardware supports polarity. Now the default number depends on the device tree which has to match hardware anyhow (and if it doesn't the error is just a bit delayed as a PWM handle with an inverted setting is catched when pwm_apply_state() is called). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-stm32-lp.c')
-rw-r--r--drivers/pwm/pwm-stm32-lp.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index af08f564ef1d..93dd03618465 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -208,8 +208,6 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev)
priv->chip.dev = &pdev->dev;
priv->chip.ops = &stm32_pwm_lp_ops;
priv->chip.npwm = 1;
- priv->chip.of_xlate = of_pwm_xlate_with_flags;
- priv->chip.of_pwm_n_cells = 3;
ret = pwmchip_add(&priv->chip);
if (ret < 0)