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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2019-01-09 11:19:05 +0300
committerThierry Reding <thierry.reding@gmail.com>2019-03-04 14:14:05 +0300
commit7f68ce8287d3b25a70455aec18ff678a908d49ee (patch)
tree0cb52f72f3a27a736137a0b8578f0bd05b793d01 /drivers/pwm/pwm-rcar.c
parent74d0c3b2050927f364e3320091f234c108bd845d (diff)
downloadlinux-7f68ce8287d3b25a70455aec18ff678a908d49ee.tar.xz
pwm: rcar: Add support "atomic" API
This patch adds support for "atomic" API. This behavior differs with legacy APIs a little. Legacy APIs: The PWMCNT register will be updated in rcar_pwm_config() even if the PWM state is disabled. Atomic API: The PWMCNT register will be updated in rcar_pwm_apply() only if the PWM state is enabled. Otherwize, if a PWM runs with 30% duty cycles and the pwm_apply_state() is called with state->enabled = 0, ->duty_cycle = 60 and ->period = 100, this is possible to output a 60% duty cycle. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-rcar.c')
-rw-r--r--drivers/pwm/pwm-rcar.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-rcar.c b/drivers/pwm/pwm-rcar.c
index a41812fc6f95..e3ab663ff3a7 100644
--- a/drivers/pwm/pwm-rcar.c
+++ b/drivers/pwm/pwm-rcar.c
@@ -192,12 +192,49 @@ static void rcar_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
rcar_pwm_update(rp, RCAR_PWMCR_EN0, 0, RCAR_PWMCR);
}
+static int rcar_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ struct pwm_state *state)
+{
+ struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
+ struct pwm_state cur_state;
+ int div, ret;
+
+ /* This HW/driver only supports normal polarity */
+ pwm_get_state(pwm, &cur_state);
+ if (state->polarity != PWM_POLARITY_NORMAL)
+ return -ENOTSUPP;
+
+ if (!state->enabled) {
+ rcar_pwm_disable(chip, pwm);
+ return 0;
+ }
+
+ div = rcar_pwm_get_clock_division(rp, state->period);
+ if (div < 0)
+ return div;
+
+ rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR);
+
+ ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period);
+ if (!ret)
+ rcar_pwm_set_clock_control(rp, div);
+
+ /* The SYNC should be set to 0 even if rcar_pwm_set_counter failed */
+ rcar_pwm_update(rp, RCAR_PWMCR_SYNC, 0, RCAR_PWMCR);
+
+ if (!ret && state->enabled)
+ ret = rcar_pwm_enable(chip, pwm);
+
+ return ret;
+}
+
static const struct pwm_ops rcar_pwm_ops = {
.request = rcar_pwm_request,
.free = rcar_pwm_free,
.config = rcar_pwm_config,
.enable = rcar_pwm_enable,
.disable = rcar_pwm_disable,
+ .apply = rcar_pwm_apply,
.owner = THIS_MODULE,
};