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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2019-06-12 22:59:00 +0300
committerThierry Reding <thierry.reding@gmail.com>2019-06-26 12:39:07 +0300
commit181164b669c91eccafa2d276ac32873310dec465 (patch)
tree07e657d032927240978e65c528678060238279f0 /drivers/pwm/pwm-meson.c
parentba4004c715c906474ae84f1f9a97f55d3259c6bd (diff)
downloadlinux-181164b669c91eccafa2d276ac32873310dec465.tar.xz
pwm: meson: Use GENMASK and FIELD_PREP for the lo and hi values
meson_pwm_calc() ensures that "lo" is always less than 16 bits wide (otherwise it would overflow into the "hi" part of the REG_PWM_{A,B} register). Use GENMASK and FIELD_PREP for the lo and hi values to make it easier to spot how wide these are internally. Additionally this is a preparation step for the .get_state() implementation where the GENMASK() for lo and hi becomes handy because it can be used with FIELD_GET() to extract the values from the register REG_PWM_{A,B} register. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-meson.c')
-rw-r--r--drivers/pwm/pwm-meson.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 8b277a2212e2..ec4407ec174d 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -5,6 +5,8 @@
* Copyright (C) 2014 Amlogic, Inc.
*/
+#include <linux/bitfield.h>
+#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -20,7 +22,8 @@
#define REG_PWM_A 0x0
#define REG_PWM_B 0x4
-#define PWM_HIGH_SHIFT 16
+#define PWM_LOW_MASK GENMASK(15, 0)
+#define PWM_HIGH_MASK GENMASK(31, 16)
#define REG_MISC_AB 0x8
#define MISC_B_CLK_EN BIT(23)
@@ -217,7 +220,8 @@ static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm)
value |= clk_enable;
writel(value, meson->base + REG_MISC_AB);
- value = (channel->hi << PWM_HIGH_SHIFT) | channel->lo;
+ value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) |
+ FIELD_PREP(PWM_LOW_MASK, channel->lo);
writel(value, meson->base + offset);
value = readl(meson->base + REG_MISC_AB);