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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-08-09 15:19:47 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-08-16 15:26:32 +0300
commit56d57391ab6720c4b7bbc0a0cbc079c7b7d653fb (patch)
tree6c21f6f34c300daed28af3ea22768908c7ef1691 /drivers/pinctrl
parent4e5a70ff61da6b24b9db6547ae234163a01df7d6 (diff)
downloadlinux-56d57391ab6720c4b7bbc0a0cbc079c7b7d653fb.tar.xz
pinctrl: sh-pfc: r8a77995: Add voltage switch operations for MMC
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a77995.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
index e747ca58b34c..4f5ee1d7317d 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
@@ -23,7 +23,7 @@
PORT_GP_9(0, fn, sfx), \
PORT_GP_32(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
- PORT_GP_10(3, fn, sfx), \
+ PORT_GP_CFG_10(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_32(4, fn, sfx), \
PORT_GP_21(5, fn, sfx), \
PORT_GP_14(6, fn, sfx)
@@ -1775,8 +1775,25 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ },
};
+static int r8a77995_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+{
+ int bit = -EINVAL;
+
+ *pocctrl = 0xe6060380;
+
+ if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 9))
+ bit = 29 - (pin - RCAR_GP_PIN(3, 0));
+
+ return bit;
+}
+
+static const struct sh_pfc_soc_operations r8a77995_pinmux_ops = {
+ .pin_to_pocctrl = r8a77995_pin_to_pocctrl,
+};
+
const struct sh_pfc_soc_info r8a77995_pinmux_info = {
.name = "r8a77995_pfc",
+ .ops = &r8a77995_pinmux_ops,
.unlock_reg = 0xe6060000, /* PMMR */
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },