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authorJerome Brunet <jbrunet@baylibre.com>2018-11-13 13:55:36 +0300
committerLinus Walleij <linus.walleij@linaro.org>2018-11-19 17:40:55 +0300
commit614b1868a125a0ba24be08f3a7fa832ddcde6bca (patch)
tree3686194fe3de91d5f7d526e28a16ca3cfcc07646 /drivers/pinctrl/sunxi
parent5db0b0a298d26c007e06a96d7e60849b4829a57c (diff)
downloadlinux-614b1868a125a0ba24be08f3a7fa832ddcde6bca.tar.xz
pinctrl: meson: fix pull enable register calculation
We just changed the code so we apply bias disable on the correct register but forgot to align the register calculation. The result is that we apply the change on the correct register, but possibly at the incorrect offset/bit This went undetected because offsets tends to be the same between REG_PULL and REG_PULLEN for a given pin the EE controller. This is not true for the AO controller. Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
0 files changed, 0 insertions, 0 deletions