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authorAndre Przywara <andre.przywara@arm.com>2017-11-25 15:12:30 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-11-30 18:48:54 +0300
commit7c5c2c2d18d778e51fd8b899965097168306031c (patch)
tree4282688a294cc22cf771dc57feab4a28e0beb4e3 /drivers/pinctrl/pinctrl-rockchip.c
parent6ad4cc8d1ac483e0fd33f605fb2788b0ecf51ed4 (diff)
downloadlinux-7c5c2c2d18d778e51fd8b899965097168306031c.tar.xz
pinctrl: sunxi: Fix A64 UART mux value
To use pin PF4 as the RX signal of UART0, we have to write 0b011 into the respective pin controller register. Fix the wrong value we had in our table so far. Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-rockchip.c')
0 files changed, 0 insertions, 0 deletions