Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "We have no core changes but lots of incremental development in drivers
  all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
  keep churning out new SoCs.

  I have some subtree maintainers for Renesas and Intel helping out to
  keep down the load, it's been working smoothly (Samsung also have a
  subtree but it was not used this cycle.)

  New drivers:

   - NXP (ex Freescale) i.MX 8 QXP SoC driver.

   - Mediatek MT6797 SoC driver.

   - Mediatek MT7629 SoC driver.

   - Actions Semiconductor S700 SoC driver.

   - Renesas RZ/A2 SoC driver.

   - Allwinner sunxi suniv F1C100 SoC driver.

   - Qualcomm PMS405 PMIC driver.

   - Microsemi Ocelot Jaguar2 SoC driver.

  Improvements:

   - Some RT improvements (using raw spinlocks where appropriate).

   - A lot of new pin sets on the Renesas PFC pin controllers.

   - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
     chips, and Xway.

   - Major modernization of the Intel pin control drivers.

   - STM32 pin control driver will now synchronize usage of pins with
     another CPU using a hardware spinlock"

* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
  dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
  pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
  pinctrl: imx-scu: Depend on IMX_SCU
  pinctrl: ocelot: Add dependency on HAS_IOMEM
  pinctrl: ocelot: add MSCC Jaguar2 support
  pinctrl: bcm: ns: support updated DT binding as syscon subnode
  dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
  MAINTAINERS: merge at91 pinctrl entries
  pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
  pinctrl: uniphier: constify uniphier_pinctrl_socdata
  pinctrl: mediatek: improve Kconfig dependencies
  pinctrl: msm: mark PM functions as __maybe_unused
  dt-bindings: pinctrl: sunxi: Add supply properties
  pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
  pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
  pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
  ...

1 files changed, 6 insertions, 8 deletions

diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c
index a7f37063518e..3d05bc1937d4 100644
--- a/drivers/pinctrl/pinctrl-max77620.c
+++ b/drivers/pinctrl/pinctrl-max77620.c
@@ -34,14 +34,12 @@ enum max77620_pin_ppdrv {
 	MAX77620_PIN_PP_DRV,
 };
 
-enum max77620_pinconf_param {
-	MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
-	MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
-	MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
-	MAX77620_SUSPEND_FPS_SOURCE,
-	MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
-	MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
-};
+#define MAX77620_ACTIVE_FPS_SOURCE		(PIN_CONFIG_END + 1)
+#define MAX77620_ACTIVE_FPS_POWER_ON_SLOTS	(PIN_CONFIG_END + 2)
+#define MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS	(PIN_CONFIG_END + 3)
+#define MAX77620_SUSPEND_FPS_SOURCE		(PIN_CONFIG_END + 4)
+#define MAX77620_SUSPEND_FPS_POWER_ON_SLOTS	(PIN_CONFIG_END + 5)
+#define MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS	(PIN_CONFIG_END + 6)
 
 struct max77620_pin_function {
 	const char *name;