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| author | Jerome Brunet <jbrunet@baylibre.com> | 2018-07-04 19:57:24 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-07-16 15:46:11 +0300 |
| commit | a130af0162409fc8a118930255979d8be4adde5a (patch) | |
| tree | 0f30ab3634bc6fcf9cadbb3088e587921aeb4373 /drivers/pinctrl/mediatek | |
| parent | a35f5c1ac2d4bdd777ffb8883961c10248da2aae (diff) | |
| download | linux-a130af0162409fc8a118930255979d8be4adde5a.tar.xz | |
pinctrl: meson: add gen_clk pins
Add the pinctrl configuration for gen_clk on gxbb and axg.
gen_clk allows to output and devide several internal clocks of SoC,
including most of the plls.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mediatek')
0 files changed, 0 insertions, 0 deletions