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| author | Hans de Goede <hdegoede@redhat.com> | 2022-02-23 16:31:49 +0300 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2022-02-24 18:44:34 +0300 |
| commit | 2f46d7f7e959da3ae18ed5d283935673f7a22354 (patch) | |
| tree | 49bd3b7c78035ccbf3ee7decc8d4b202f35349db /drivers/pinctrl/intel | |
| parent | e783362eb54cd99b2cac8b3a9aeac942e6f6ac07 (diff) | |
| download | linux-2f46d7f7e959da3ae18ed5d283935673f7a22354.tar.xz | |
pinctrl: baytrail: Add pinconf group + function for the pmu_clk
On the Lenovo Yoga Tablet 2 830 / 1050 / 1051 models the 32KHz PMU clk,
which can be muxed externally to SUS pin 5 and/or 6 is used as a clock
for the audio codec.
On the 830 and 1050 models, with ship with Android as factory OS the
pin-muxing for this is not setup by the BIOS.
Add a pinconf group + function for the pmu_clk on SUS pin 5 and 6 to
allow setting the pinmux up from within the x86-android-tablets
platform code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220223133153.730337-2-hdegoede@redhat.com
Diffstat (limited to 'drivers/pinctrl/intel')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-baytrail.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 4c01333e1406..1cc660e6458e 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -443,6 +443,9 @@ static const unsigned int byt_sus_pcu_spi_pins[] = { 21 }; static const unsigned int byt_sus_pcu_spi_mode_values[] = { 0 }; static const unsigned int byt_sus_pcu_spi_gpio_mode_values[] = { 1 }; +static const unsigned int byt_sus_pmu_clk1_pins[] = { 5 }; +static const unsigned int byt_sus_pmu_clk2_pins[] = { 6 }; + static const struct intel_pingroup byt_sus_groups[] = { PIN_GROUP("usb_oc_grp", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_mode_values), PIN_GROUP("usb_ulpi_grp", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_mode_values), @@ -450,20 +453,27 @@ static const struct intel_pingroup byt_sus_groups[] = { PIN_GROUP("usb_oc_grp_gpio", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_gpio_mode_values), PIN_GROUP("usb_ulpi_grp_gpio", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_gpio_mode_values), PIN_GROUP("pcu_spi_grp_gpio", byt_sus_pcu_spi_pins, byt_sus_pcu_spi_gpio_mode_values), + PIN_GROUP("pmu_clk1_grp", byt_sus_pmu_clk1_pins, 1), + PIN_GROUP("pmu_clk2_grp", byt_sus_pmu_clk2_pins, 1), }; static const char * const byt_sus_usb_groups[] = { "usb_oc_grp", "usb_ulpi_grp", }; static const char * const byt_sus_spi_groups[] = { "pcu_spi_grp" }; +static const char * const byt_sus_pmu_clk_groups[] = { + "pmu_clk1_grp", "pmu_clk2_grp", +}; static const char * const byt_sus_gpio_groups[] = { "usb_oc_grp_gpio", "usb_ulpi_grp_gpio", "pcu_spi_grp_gpio", + "pmu_clk1_grp", "pmu_clk2_grp", }; static const struct intel_function byt_sus_functions[] = { FUNCTION("usb", byt_sus_usb_groups), FUNCTION("spi", byt_sus_spi_groups), FUNCTION("gpio", byt_sus_gpio_groups), + FUNCTION("pmu_clk", byt_sus_pmu_clk_groups), }; static const struct intel_community byt_sus_communities[] = { |