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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2022-05-12 20:39:21 +0300
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2022-05-16 20:16:54 +0300
commit180f9db7754539f16a0de4a145d33ce713302a9a (patch)
tree6495c045ad110e513d66ce71d1b74df585dff637 /drivers/pinctrl/intel
parentdf38990dec1e1d1e09c60bcd4713e01fe975ba88 (diff)
downloadlinux-180f9db7754539f16a0de4a145d33ce713302a9a.tar.xz
pinctrl: lynxpoint: make irq_chip immutable
Since recently, the kernel is nagging about mutable irq_chips: "not an immutable chip, please consider fixing it!" Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions. While at it, switch hwirq variable to use the correct type for the sake of consistency. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
-rw-r--r--drivers/pinctrl/intel/pinctrl-lynxpoint.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
index 561fa322b0b4..4fb39eb30902 100644
--- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c
+++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
@@ -663,7 +663,7 @@ static void lp_irq_ack(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *lg = gpiochip_get_data(gc);
- u32 hwirq = irqd_to_hwirq(d);
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_STAT);
unsigned long flags;
@@ -684,10 +684,12 @@ static void lp_irq_enable(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *lg = gpiochip_get_data(gc);
- u32 hwirq = irqd_to_hwirq(d);
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
unsigned long flags;
+ gpiochip_enable_irq(gc, hwirq);
+
raw_spin_lock_irqsave(&lg->lock, flags);
iowrite32(ioread32(reg) | BIT(hwirq % 32), reg);
raw_spin_unlock_irqrestore(&lg->lock, flags);
@@ -697,30 +699,33 @@ static void lp_irq_disable(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *lg = gpiochip_get_data(gc);
- u32 hwirq = irqd_to_hwirq(d);
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
unsigned long flags;
raw_spin_lock_irqsave(&lg->lock, flags);
iowrite32(ioread32(reg) & ~BIT(hwirq % 32), reg);
raw_spin_unlock_irqrestore(&lg->lock, flags);
+
+ gpiochip_disable_irq(gc, hwirq);
}
static int lp_irq_set_type(struct irq_data *d, unsigned int type)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *lg = gpiochip_get_data(gc);
- u32 hwirq = irqd_to_hwirq(d);
- void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1);
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
unsigned long flags;
+ void __iomem *reg;
u32 value;
- if (hwirq >= lg->chip.ngpio)
+ reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1);
+ if (!reg)
return -EINVAL;
/* Fail if BIOS reserved pin for ACPI use */
if (lp_gpio_acpi_use(lg, hwirq)) {
- dev_err(lg->dev, "pin %u can't be used as IRQ\n", hwirq);
+ dev_err(lg->dev, "pin %lu can't be used as IRQ\n", hwirq);
return -EBUSY;
}
@@ -755,7 +760,7 @@ static int lp_irq_set_type(struct irq_data *d, unsigned int type)
return 0;
}
-static struct irq_chip lp_irqchip = {
+static const struct irq_chip lp_irqchip = {
.name = "LP-GPIO",
.irq_ack = lp_irq_ack,
.irq_mask = lp_irq_mask,
@@ -763,7 +768,8 @@ static struct irq_chip lp_irqchip = {
.irq_enable = lp_irq_enable,
.irq_disable = lp_irq_disable,
.irq_set_type = lp_irq_set_type,
- .flags = IRQCHIP_SKIP_SET_WAKE,
+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
+ GPIOCHIP_IRQ_RESOURCE_HELPERS,
};
static int lp_gpio_irq_init_hw(struct gpio_chip *chip)
@@ -884,7 +890,7 @@ static int lp_gpio_probe(struct platform_device *pdev)
struct gpio_irq_chip *girq;
girq = &gc->irq;
- girq->chip = &lp_irqchip;
+ gpio_irq_chip_set_chip(girq, &lp_irqchip);
girq->init_hw = lp_gpio_irq_init_hw;
girq->parent_handler = lp_gpio_irq_handler;
girq->num_parents = 1;