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authorMika Westerberg <mika.westerberg@linux.intel.com>2017-01-27 13:07:15 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-01-30 17:04:23 +0300
commit04cc058f0c5261c5bd6fa5febf79056db4a187a6 (patch)
tree57be2b3d0cd50834c807bedf36df0ba852760403 /drivers/pinctrl/intel
parente57725eabf87c9c75bc73bd19ea00e887155e43f (diff)
downloadlinux-04cc058f0c5261c5bd6fa5febf79056db4a187a6.tar.xz
pinctrl: intel: Add support for 1k additional pull-down
The next generation Intel GPIO hardware supports additional 1k pull-down per-pad. Add support for this to the Intel core pinctrl driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel')
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.c18
-rw-r--r--drivers/pinctrl/intel/pinctrl-intel.h1
2 files changed, 18 insertions, 1 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 36263d69df41..523264463d35 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -458,12 +458,14 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
{
struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
enum pin_config_param param = pinconf_to_config_param(*config);
+ const struct intel_community *community;
u32 value, term;
u32 arg = 0;
if (!intel_pad_owned_by_host(pctrl, pin))
return -ENOTSUPP;
+ community = intel_get_community(pctrl, pin);
value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
@@ -499,6 +501,11 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
return -EINVAL;
switch (term) {
+ case PADCFG1_TERM_1K:
+ if (!(community->features & PINCTRL_FEATURE_1K_PD))
+ return -EINVAL;
+ arg = 1000;
+ break;
case PADCFG1_TERM_5K:
arg = 5000;
break;
@@ -540,6 +547,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
{
unsigned param = pinconf_to_config_param(config);
unsigned arg = pinconf_to_config_argument(config);
+ const struct intel_community *community;
void __iomem *padcfg1;
unsigned long flags;
int ret = 0;
@@ -547,6 +555,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
raw_spin_lock_irqsave(&pctrl->lock, flags);
+ community = intel_get_community(pctrl, pin);
padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
value = readl(padcfg1);
@@ -589,6 +598,11 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
case 5000:
value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
break;
+ case 1000:
+ if (!(community->features & PINCTRL_FEATURE_1K_PD))
+ return -EINVAL;
+ value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+ break;
default:
ret = -EINVAL;
}
@@ -1115,8 +1129,10 @@ int intel_pinctrl_probe(struct platform_device *pdev,
u32 rev;
rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
- if (rev >= 0x94)
+ if (rev >= 0x94) {
community->features |= PINCTRL_FEATURE_DEBOUNCE;
+ community->features |= PINCTRL_FEATURE_1K_PD;
+ }
}
/* Read offset of the pad configuration registers */
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 1ff5abf309e3..fe9521f345b5 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -81,6 +81,7 @@ struct intel_community {
/* Additional features supported by the hardware */
#define PINCTRL_FEATURE_DEBOUNCE BIT(0)
+#define PINCTRL_FEATURE_1K_PD BIT(1)
#define PIN_GROUP(n, p, m) \
{ \