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| author | Krzysztof Adamski <krzysztof.adamski@tieto.com> | 2016-02-09 17:58:49 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-02-11 16:30:29 +0300 |
| commit | be2d107f44339def4c2cfb876c7c001e4169e419 (patch) | |
| tree | 8c33a64a3a5df372f3c4c8b149ebcf02e5e73539 /drivers/pinctrl/intel/pinctrl-intel.c | |
| parent | ba83a11104ae7d156c73f4db288ec7a0b7edcdb5 (diff) | |
| download | linux-be2d107f44339def4c2cfb876c7c001e4169e419.tar.xz | |
pinctrl: sunxi: Use pin number when calling sunxi_pmx_set
sunxi_pmx_set accepts pin number and then calculates offset by
subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
gets offset so we have to convert it to pin number so we won't get
negative value in sunxi_pmx_set.
This was only used on A10 so far, where there is only one GPIO chip with
pin_base set to 0 so it didn't matter. However H3 also requires this
workaround but have two pinmux sections, triggering problem for PL port.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-intel.c')
0 files changed, 0 insertions, 0 deletions