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authorLinus Torvalds <torvalds@linux-foundation.org>2016-11-12 03:21:20 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2016-11-12 03:21:20 +0300
commit5c03b53cb7386a5a9ee16b50de4d77d5cd06a438 (patch)
tree97a39e3178b49adb3a892c9cdc713897fde2c709 /drivers/pinctrl/intel/pinctrl-cherryview.c
parent015ed9433be2b476ec7e2e6a9a411a56e3b5b035 (diff)
parenta33547cc764ca994d27a8fcc5fc61fbf4b2f7361 (diff)
downloadlinux-5c03b53cb7386a5a9ee16b50de4d77d5cd06a438.tar.xz
Merge tag 'pinctrl-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij: "All is about drivers, no core business going on. - Fix a host of runtime problems with the Intel Cherryview driver: suspend/resume needs to be marshalled properly, and strange effects from BIOS interaction during suspend/resume need to be dealt with. - A single bit was being set wrong in the Aspeed driver. - Fix an iProc probe ordering fallout resulting from v4.9 refactorings for bus population. - Do not specify a default trigger in the ST Micro cascaded GPIO IRQ controller: the kernel will moan. - Make IRQs optional altogether on the STM32 driver, it turns out not all systems have them or want them. - Fix a re-probe bug in the i.MX driver, it will eventually crash if probed repeatedly, not good" * tag 'pinctrl-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl-aspeed-g5: Never set SCU90[6] pinctrl: cherryview: Prevent possible interrupt storm on resume pinctrl: cherryview: Serialize register access in suspend/resume pinctrl: imx: reset group index on probe pinctrl: stm32: move gpio irqs binding to optional pinctrl: stm32: remove dependency with interrupt controller pinctrl: st: don't specify default interrupt trigger pinctrl: iproc: Fix iProc and NSP GPIO support
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-cherryview.c')
-rw-r--r--drivers/pinctrl/intel/pinctrl-cherryview.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index 30389f4ccab4..c43b1e9a06af 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -1652,12 +1652,15 @@ static int chv_pinctrl_probe(struct platform_device *pdev)
}
#ifdef CONFIG_PM_SLEEP
-static int chv_pinctrl_suspend(struct device *dev)
+static int chv_pinctrl_suspend_noirq(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct chv_pinctrl *pctrl = platform_get_drvdata(pdev);
+ unsigned long flags;
int i;
+ raw_spin_lock_irqsave(&chv_lock, flags);
+
pctrl->saved_intmask = readl(pctrl->regs + CHV_INTMASK);
for (i = 0; i < pctrl->community->npins; i++) {
@@ -1678,15 +1681,20 @@ static int chv_pinctrl_suspend(struct device *dev)
ctx->padctrl1 = readl(reg);
}
+ raw_spin_unlock_irqrestore(&chv_lock, flags);
+
return 0;
}
-static int chv_pinctrl_resume(struct device *dev)
+static int chv_pinctrl_resume_noirq(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct chv_pinctrl *pctrl = platform_get_drvdata(pdev);
+ unsigned long flags;
int i;
+ raw_spin_lock_irqsave(&chv_lock, flags);
+
/*
* Mask all interrupts before restoring per-pin configuration
* registers because we don't know in which state BIOS left them
@@ -1731,12 +1739,15 @@ static int chv_pinctrl_resume(struct device *dev)
chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);
chv_writel(pctrl->saved_intmask, pctrl->regs + CHV_INTMASK);
+ raw_spin_unlock_irqrestore(&chv_lock, flags);
+
return 0;
}
#endif
static const struct dev_pm_ops chv_pinctrl_pm_ops = {
- SET_LATE_SYSTEM_SLEEP_PM_OPS(chv_pinctrl_suspend, chv_pinctrl_resume)
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(chv_pinctrl_suspend_noirq,
+ chv_pinctrl_resume_noirq)
};
static const struct acpi_device_id chv_pinctrl_acpi_match[] = {