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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-20 00:19:33 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-20 00:19:33 +0300 |
commit | 3c2edc36a77420d8be05d656019dbc8c31535992 (patch) | |
tree | 70d8c9abb04c89e82c79c46efd2f7cb1bf836ef5 /drivers/pinctrl/aspeed/pinmux-aspeed.h | |
parent | 32b90daf5cafdda62b1ce62d0b7445fa9107babf (diff) | |
parent | cb0438e4436085d89706b5ccfce4d5da531253de (diff) | |
download | linux-3c2edc36a77420d8be05d656019dbc8c31535992.tar.xz |
Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.4 kernel cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver"
* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
pinctrl: bcm: remove redundant assignment to pointer log
pinctrl: iproc: Add 'get_direction' support
pinctrl: iproc-gpio: Handle interrupts for multiple instances
pinctrl: iproc-gpio: Fix incorrect pinconf configurations
pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
pinctrl: qcom: sdm845: Fix UFS_RESET pin
pinctrl: mvebu: add additional variant for standalone CP115
pinctrl: mvebu: Add CP110 missing pin functionality
dt-bindings: cp110: document the new CP115 pinctrl compatible
pinctrl: bcm2835: Pass irqchip when adding gpiochip
pinctrl: meson: meson: Add of_node_put() before return
pinctrl/gpio: Take MUX usage into account
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
pinctrl: amd: disable spurious-firing GPIO IRQs
pinctrl: rza2: Include the appropriate headers
pinctrl: rza2: Drop driver use of consumer flags
...
Diffstat (limited to 'drivers/pinctrl/aspeed/pinmux-aspeed.h')
-rw-r--r-- | drivers/pinctrl/aspeed/pinmux-aspeed.h | 227 |
1 files changed, 150 insertions, 77 deletions
diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.h b/drivers/pinctrl/aspeed/pinmux-aspeed.h index db3457c86f48..a2c0d52e4f7b 100644 --- a/drivers/pinctrl/aspeed/pinmux-aspeed.h +++ b/drivers/pinctrl/aspeed/pinmux-aspeed.h @@ -162,10 +162,11 @@ * * Enabling lower priority signals requires higher priority signals be * disabled * - * * A function represents a set of signals; functions are distinct if their - * sets of signals are not equal + * * A function represents a set of signals; functions are distinct if they + * do not share a subset of signals (and may be distinct if they are a + * strict subset). * - * * Signals participate in one or more functions + * * Signals participate in one or more functions or groups * * * A function is described by an expression of one or more signal * descriptors, which compare bit values in a register @@ -507,20 +508,21 @@ struct aspeed_pin_desc { * @idx: The bit index in the register */ #define SIG_DESC_SET(reg, idx) SIG_DESC_IP_BIT(ASPEED_IP_SCU, reg, idx, 1) +#define SIG_DESC_CLEAR(reg, idx) SIG_DESC_IP_BIT(ASPEED_IP_SCU, reg, idx, 0) -#define SIG_DESC_LIST_SYM(sig, func) sig_descs_ ## sig ## _ ## func -#define SIG_DESC_LIST_DECL(sig, func, ...) \ - static const struct aspeed_sig_desc SIG_DESC_LIST_SYM(sig, func)[] = \ +#define SIG_DESC_LIST_SYM(sig, group) sig_descs_ ## sig ## _ ## group +#define SIG_DESC_LIST_DECL(sig, group, ...) \ + static const struct aspeed_sig_desc SIG_DESC_LIST_SYM(sig, group)[] = \ { __VA_ARGS__ } -#define SIG_EXPR_SYM(sig, func) sig_expr_ ## sig ## _ ## func -#define SIG_EXPR_DECL_(sig, func) \ - static const struct aspeed_sig_expr SIG_EXPR_SYM(sig, func) = \ +#define SIG_EXPR_SYM(sig, group) sig_expr_ ## sig ## _ ## group +#define SIG_EXPR_DECL_(sig, group, func) \ + static const struct aspeed_sig_expr SIG_EXPR_SYM(sig, group) = \ { \ .signal = #sig, \ .function = #func, \ - .ndescs = ARRAY_SIZE(SIG_DESC_LIST_SYM(sig, func)), \ - .descs = &(SIG_DESC_LIST_SYM(sig, func))[0], \ + .ndescs = ARRAY_SIZE(SIG_DESC_LIST_SYM(sig, group)), \ + .descs = &(SIG_DESC_LIST_SYM(sig, group))[0], \ } /** @@ -533,16 +535,16 @@ struct aspeed_pin_desc { * * For example, the following declares the ROMD8 signal for the ROM16 function: * - * SIG_EXPR_DECL(ROMD8, ROM16, SIG_DESC_SET(SCU90, 6)); + * SIG_EXPR_DECL(ROMD8, ROM16, ROM16, SIG_DESC_SET(SCU90, 6)); * * And with multiple signal descriptors: * - * SIG_EXPR_DECL(ROMD8, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), + * SIG_EXPR_DECL(ROMD8, ROM16S, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), * { HW_STRAP1, GENMASK(1, 0), 0, 0 }); */ -#define SIG_EXPR_DECL(sig, func, ...) \ - SIG_DESC_LIST_DECL(sig, func, __VA_ARGS__); \ - SIG_EXPR_DECL_(sig, func) +#define SIG_EXPR_DECL(sig, group, func, ...) \ + SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \ + SIG_EXPR_DECL_(sig, group, func) /** * Declare a pointer to a signal expression @@ -550,9 +552,9 @@ struct aspeed_pin_desc { * @sig: The macro symbol name for the signal (subjected to token pasting) * @func: The macro symbol name for the function (subjected to token pasting) */ -#define SIG_EXPR_PTR(sig, func) (&SIG_EXPR_SYM(sig, func)) +#define SIG_EXPR_PTR(sig, group) (&SIG_EXPR_SYM(sig, group)) -#define SIG_EXPR_LIST_SYM(sig) sig_exprs_ ## sig +#define SIG_EXPR_LIST_SYM(sig, group) sig_exprs_ ## sig ## _ ## group /** * Declare a signal expression list for reference in a struct aspeed_pin_prio. @@ -563,80 +565,101 @@ struct aspeed_pin_desc { * For example, the 16-bit ROM bus can be enabled by one of two possible signal * expressions: * - * SIG_EXPR_DECL(ROMD8, ROM16, SIG_DESC_SET(SCU90, 6)); - * SIG_EXPR_DECL(ROMD8, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), + * SIG_EXPR_DECL(ROMD8, ROM16, ROM16, SIG_DESC_SET(SCU90, 6)); + * SIG_EXPR_DECL(ROMD8, ROM16S, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), * { HW_STRAP1, GENMASK(1, 0), 0, 0 }); * SIG_EXPR_LIST_DECL(ROMD8, SIG_EXPR_PTR(ROMD8, ROM16), * SIG_EXPR_PTR(ROMD8, ROM16S)); */ -#define SIG_EXPR_LIST_DECL(sig, ...) \ - static const struct aspeed_sig_expr *SIG_EXPR_LIST_SYM(sig)[] = \ +#define SIG_EXPR_LIST_DECL(sig, group, ...) \ + static const struct aspeed_sig_expr *SIG_EXPR_LIST_SYM(sig, group)[] =\ { __VA_ARGS__, NULL } +#define stringify(x) #x +#define istringify(x) stringify(x) + +/** + * Create an expression symbol alias from (signal, group) to (pin, signal). + * + * @pin: The pin number + * @sig: The signal name + * @group: The name of the group of which the pin is a member that is + * associated with the function's signal + * + * Using an alias in this way enables detection of copy/paste errors (defining + * the signal for a group multiple times) whilst enabling multiple pin groups + * to exist for a signal without intrusive side-effects on defining the list of + * signals available on a pin. + */ +#define SIG_EXPR_LIST_ALIAS(pin, sig, group) \ + static const struct aspeed_sig_expr *\ + SIG_EXPR_LIST_SYM(pin, sig)[ARRAY_SIZE(SIG_EXPR_LIST_SYM(sig, group))] \ + __attribute__((alias(istringify(SIG_EXPR_LIST_SYM(sig, group))))) + /** * A short-hand macro for declaring a function expression and an expression - * list with a single function. + * list with a single expression (SE) and a single group (SG) of pins. * - * @func: A macro symbol name for the function (is subjected to token pasting) + * @pin: The pin the signal will be routed to + * @sig: The signal that will be routed to the pin for the function + * @func: A macro symbol name for the function * @...: Function descriptors that define the function expression * * For example, signal NCTS6 participates in its own function with one group: * - * SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, SIG_DESC_SET(SCU90, 7)); + * SIG_EXPR_LIST_DECL_SINGLE(A18, NCTS6, NCTS6, SIG_DESC_SET(SCU90, 7)); */ -#define SIG_EXPR_LIST_DECL_SINGLE(sig, func, ...) \ +#define SIG_EXPR_LIST_DECL_SESG(pin, sig, func, ...) \ SIG_DESC_LIST_DECL(sig, func, __VA_ARGS__); \ - SIG_EXPR_DECL_(sig, func); \ - SIG_EXPR_LIST_DECL(sig, SIG_EXPR_PTR(sig, func)) + SIG_EXPR_DECL_(sig, func, func); \ + SIG_EXPR_LIST_DECL(sig, func, SIG_EXPR_PTR(sig, func)); \ + SIG_EXPR_LIST_ALIAS(pin, sig, func) + +/** + * Similar to the above, but for pins with a single expression (SE) and + * multiple groups (MG) of pins. + * + * @pin: The pin the signal will be routed to + * @sig: The signal that will be routed to the pin for the function + * @group: The name of the function's pin group in which the pin participates + * @func: A macro symbol name for the function + * @...: Function descriptors that define the function expression + */ +#define SIG_EXPR_LIST_DECL_SEMG(pin, sig, group, func, ...) \ + SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \ + SIG_EXPR_DECL_(sig, group, func); \ + SIG_EXPR_LIST_DECL(sig, group, SIG_EXPR_PTR(sig, group)); \ + SIG_EXPR_LIST_ALIAS(pin, sig, group) -#define SIG_EXPR_LIST_DECL_DUAL(sig, f0, f1) \ - SIG_EXPR_LIST_DECL(sig, SIG_EXPR_PTR(sig, f0), SIG_EXPR_PTR(sig, f1)) +/** + * Similar to the above, but for pins with a dual expressions (DE) and + * and a single group (SG) of pins. + * + * @pin: The pin the signal will be routed to + * @sig: The signal that will be routed to the pin for the function + * @group: The name of the function's pin group in which the pin participates + * @func: A macro symbol name for the function + * @...: Function descriptors that define the function expression + */ +#define SIG_EXPR_LIST_DECL_DESG(pin, sig, f0, f1) \ + SIG_EXPR_LIST_DECL(sig, f0, \ + SIG_EXPR_PTR(sig, f0), \ + SIG_EXPR_PTR(sig, f1)); \ + SIG_EXPR_LIST_ALIAS(pin, sig, f0) -#define SIG_EXPR_LIST_PTR(sig) (&SIG_EXPR_LIST_SYM(sig)[0]) +#define SIG_EXPR_LIST_PTR(sig, group) SIG_EXPR_LIST_SYM(sig, group) #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) #define PIN_SYM(pin) pin_ ## pin -#define MS_PIN_DECL_(pin, ...) \ +#define PIN_DECL_(pin, ...) \ static const struct aspeed_sig_expr **PIN_EXPRS_SYM(pin)[] = \ { __VA_ARGS__, NULL }; \ static const struct aspeed_pin_desc PIN_SYM(pin) = \ { #pin, PIN_EXPRS_PTR(pin) } /** - * Declare a multi-signal pin - * - * @pin: The pin number - * @other: Macro name for "other" functionality (subjected to stringification) - * @high: Macro name for the highest priority signal functions - * @low: Macro name for the low signal functions - * - * For example: - * - * #define A8 56 - * SIG_EXPR_DECL(ROMD8, ROM16, SIG_DESC_SET(SCU90, 6)); - * SIG_EXPR_DECL(ROMD8, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), - * { HW_STRAP1, GENMASK(1, 0), 0, 0 }); - * SIG_EXPR_LIST_DECL(ROMD8, SIG_EXPR_PTR(ROMD8, ROM16), - * SIG_EXPR_PTR(ROMD8, ROM16S)); - * SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, SIG_DESC_SET(SCU90, 7)); - * MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6); - */ -#define MS_PIN_DECL(pin, other, high, low) \ - SIG_EXPR_LIST_DECL_SINGLE(other, other); \ - MS_PIN_DECL_(pin, \ - SIG_EXPR_LIST_PTR(high), \ - SIG_EXPR_LIST_PTR(low), \ - SIG_EXPR_LIST_PTR(other)) - -#define PIN_GROUP_SYM(func) pins_ ## func -#define FUNC_GROUP_SYM(func) groups_ ## func -#define FUNC_GROUP_DECL(func, ...) \ - static const int PIN_GROUP_SYM(func)[] = { __VA_ARGS__ }; \ - static const char *FUNC_GROUP_SYM(func)[] = { #func } - -/** * Declare a single signal pin * * @pin: The pin number @@ -647,11 +670,12 @@ struct aspeed_pin_desc { * * #define E3 80 * SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC); - * SS_PIN_DECL(E3, GPIOK0, SCL5); + * PIN_DECL_1(E3, GPIOK0, SCL5); */ -#define SS_PIN_DECL(pin, other, sig) \ - SIG_EXPR_LIST_DECL_SINGLE(other, other); \ - MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(sig), SIG_EXPR_LIST_PTR(other)) +#define PIN_DECL_1(pin, other, sig) \ + SIG_EXPR_LIST_DECL_SESG(pin, other, other); \ + PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \ + SIG_EXPR_LIST_PTR(pin, other)) /** * Single signal, single function pin declaration @@ -666,14 +690,63 @@ struct aspeed_pin_desc { * SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2)); */ #define SSSF_PIN_DECL(pin, other, sig, ...) \ - SIG_EXPR_LIST_DECL_SINGLE(sig, sig, __VA_ARGS__); \ - SIG_EXPR_LIST_DECL_SINGLE(other, other); \ - MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(sig), SIG_EXPR_LIST_PTR(other)); \ + SIG_EXPR_LIST_DECL_SESG(pin, sig, sig, __VA_ARGS__); \ + SIG_EXPR_LIST_DECL_SESG(pin, other, other); \ + PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \ + SIG_EXPR_LIST_PTR(pin, other)); \ FUNC_GROUP_DECL(sig, pin) +/** + * Declare a two-signal pin + * + * @pin: The pin number + * @other: Macro name for "other" functionality (subjected to stringification) + * @high: Macro name for the highest priority signal functions + * @low: Macro name for the low signal functions + * + * For example: + * + * #define A8 56 + * SIG_EXPR_DECL(ROMD8, ROM16, SIG_DESC_SET(SCU90, 6)); + * SIG_EXPR_DECL(ROMD8, ROM16S, SIG_DESC_SET(HW_STRAP1, 4), + * { HW_STRAP1, GENMASK(1, 0), 0, 0 }); + * SIG_EXPR_LIST_DECL(ROMD8, SIG_EXPR_PTR(ROMD8, ROM16), + * SIG_EXPR_PTR(ROMD8, ROM16S)); + * SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, SIG_DESC_SET(SCU90, 7)); + * PIN_DECL_2(A8, GPIOH0, ROMD8, NCTS6); + */ +#define PIN_DECL_2(pin, other, high, low) \ + SIG_EXPR_LIST_DECL_SESG(pin, other, other); \ + PIN_DECL_(pin, \ + SIG_EXPR_LIST_PTR(pin, high), \ + SIG_EXPR_LIST_PTR(pin, low), \ + SIG_EXPR_LIST_PTR(pin, other)) + +#define PIN_DECL_3(pin, other, high, medium, low) \ + SIG_EXPR_LIST_DECL_SESG(pin, other, other); \ + PIN_DECL_(pin, \ + SIG_EXPR_LIST_PTR(pin, high), \ + SIG_EXPR_LIST_PTR(pin, medium), \ + SIG_EXPR_LIST_PTR(pin, low), \ + SIG_EXPR_LIST_PTR(pin, other)) + +#define GROUP_SYM(group) group_pins_ ## group +#define GROUP_DECL(group, ...) \ + static const int GROUP_SYM(group)[] = { __VA_ARGS__ } + +#define FUNC_SYM(func) func_groups_ ## func +#define FUNC_DECL_(func, ...) \ + static const char *FUNC_SYM(func)[] = { __VA_ARGS__ } + +#define FUNC_DECL_2(func, one, two) FUNC_DECL_(func, #one, #two) + +#define FUNC_GROUP_DECL(func, ...) \ + GROUP_DECL(func, __VA_ARGS__); \ + FUNC_DECL_(func, #func) + #define GPIO_PIN_DECL(pin, gpio) \ - SIG_EXPR_LIST_DECL_SINGLE(gpio, gpio); \ - MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(gpio)) + SIG_EXPR_LIST_DECL_SESG(pin, gpio, gpio); \ + PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, gpio)) struct aspeed_pin_group { const char *name; @@ -683,8 +756,8 @@ struct aspeed_pin_group { #define ASPEED_PINCTRL_GROUP(name_) { \ .name = #name_, \ - .pins = &(PIN_GROUP_SYM(name_))[0], \ - .npins = ARRAY_SIZE(PIN_GROUP_SYM(name_)), \ + .pins = &(GROUP_SYM(name_))[0], \ + .npins = ARRAY_SIZE(GROUP_SYM(name_)), \ } struct aspeed_pin_function { @@ -695,8 +768,8 @@ struct aspeed_pin_function { #define ASPEED_PINCTRL_FUNC(name_, ...) { \ .name = #name_, \ - .groups = &FUNC_GROUP_SYM(name_)[0], \ - .ngroups = ARRAY_SIZE(FUNC_GROUP_SYM(name_)), \ + .groups = &FUNC_SYM(name_)[0], \ + .ngroups = ARRAY_SIZE(FUNC_SYM(name_)), \ } struct aspeed_pinmux_data; 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