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authorDouglas Anderson <dianders@chromium.org>2016-06-27 20:39:26 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2016-07-25 11:38:00 +0300
commit4e2ea670861f2068082da310f25815c7498a41dc (patch)
tree43835a03c84a798e585839b68ba67a61d18f22f2 /drivers/phy/phy-stih41x-usb.c
parent6fc09244d74ded1c7210fb493a17e7c29dde2010 (diff)
downloadlinux-4e2ea670861f2068082da310f25815c7498a41dc.tar.xz
phy: rockchip-emmc: Be tolerant to card clock of 0 in power on
It's possible that there are some reasons to turn the PHY on while the clock is 0. In this case we just won't wait for the DLL to lock. This is a bit of a stopgap until we figure out exactly when we're supposed to wait for the DLL to lock and when we're supposed to power cycle the PHY. Note: this patch should help with suspend/resume where the system will try to turn the PHY back on when the clock is 0. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/phy/phy-stih41x-usb.c')
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