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authorKulkarni, Ganapatrao <Ganapatrao.Kulkarni@cavium.com>2018-12-06 14:51:31 +0300
committerWill Deacon <will.deacon@arm.com>2018-12-06 16:03:17 +0300
commit69c32972d59388c041268e8206e8eb1acff29b9a (patch)
tree1d1e477db9250533e5f6cb26a9cb4c74097ff487 /drivers/perf/Makefile
parentd6310a3f3396e004bdb7a76787a2a3bbc643d0b7 (diff)
downloadlinux-69c32972d59388c041268e8206e8eb1acff29b9a.tar.xz
drivers/perf: Add Cavium ThunderX2 SoC UNCORE PMU driver
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> [will: consistent enum cpuhp_state naming] Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/perf/Makefile')
-rw-r--r--drivers/perf/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile
index b3902bd37d53..909f27fd9db3 100644
--- a/drivers/perf/Makefile
+++ b/drivers/perf/Makefile
@@ -7,5 +7,6 @@ obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o
obj-$(CONFIG_HISI_PMU) += hisilicon/
obj-$(CONFIG_QCOM_L2_PMU) += qcom_l2_pmu.o
obj-$(CONFIG_QCOM_L3_PMU) += qcom_l3_pmu.o
+obj-$(CONFIG_THUNDERX2_PMU) += thunderx2_pmu.o
obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o
obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o