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| author | Will Deacon <will.deacon@arm.com> | 2018-12-12 21:59:39 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-12-12 22:00:25 +0300 |
| commit | b47f515bdcd4e22b0b87141157c9ee8bc7c9bb98 (patch) | |
| tree | e43141b5b33fc33c0bb2870127264da658378b83 /drivers/perf/Kconfig | |
| parent | 0a1213fa7432778b71a1c0166bf56660a3aab030 (diff) | |
| parent | 69c32972d59388c041268e8206e8eb1acff29b9a (diff) | |
| download | linux-b47f515bdcd4e22b0b87141157c9ee8bc7c9bb98.tar.xz | |
Merge branch 'for-next/perf' into aarch64/for-next/core
Merge in arm64 perf and PMU driver updates, including support for the
system/uncore PMU in the ThunderX2 platform.
Diffstat (limited to 'drivers/perf/Kconfig')
| -rw-r--r-- | drivers/perf/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 08ebaf7cca8b..af9bc178495d 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -87,6 +87,15 @@ config QCOM_L3_PMU Adds the L3 cache PMU into the perf events subsystem for monitoring L3 cache events. +config THUNDERX2_PMU + tristate "Cavium ThunderX2 SoC PMU UNCORE" + depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA + default m + help + Provides support for ThunderX2 UNCORE events. + The SoC has PMU support in its L3 cache controller (L3C) and + in the DDR4 Memory Controller (DMC). + config XGENE_PMU depends on ARCH_XGENE bool "APM X-Gene SoC PMU" |