summaryrefslogtreecommitdiff
path: root/drivers/pci
diff options
context:
space:
mode:
authorJames Morris <jmorris@namei.org>2008-12-04 09:16:36 +0300
committerJames Morris <jmorris@namei.org>2008-12-04 09:16:36 +0300
commitec98ce480ada787f2cfbd696980ff3564415505b (patch)
tree1a4d644b38f9f1e4b4e086fde0b195df4a92cf84 /drivers/pci
parent3496f92beb9aa99ef21fccc154a36c7698e9c538 (diff)
parentfeaf3848a813a106f163013af6fcf6c4bfec92d9 (diff)
downloadlinux-ec98ce480ada787f2cfbd696980ff3564415505b.tar.xz
Merge branch 'master' into next
Conflicts: fs/nfsd/nfs4recover.c Manually fixed above to use new creds API functions, e.g. nfs4_save_creds(). Signed-off-by: James Morris <jmorris@namei.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/intel-iommu.c6
-rw-r--r--drivers/pci/pci.c6
-rw-r--r--drivers/pci/quirks.c17
3 files changed, 24 insertions, 5 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index a2692724b68f..5c8baa43ac9c 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -1655,12 +1655,14 @@ int __init init_dmars(void)
iommu->flush.flush_context = __iommu_flush_context;
iommu->flush.flush_iotlb = __iommu_flush_iotlb;
printk(KERN_INFO "IOMMU 0x%Lx: using Register based "
- "invalidation\n", drhd->reg_base_addr);
+ "invalidation\n",
+ (unsigned long long)drhd->reg_base_addr);
} else {
iommu->flush.flush_context = qi_flush_context;
iommu->flush.flush_iotlb = qi_flush_iotlb;
printk(KERN_INFO "IOMMU 0x%Lx: using Queued "
- "invalidation\n", drhd->reg_base_addr);
+ "invalidation\n",
+ (unsigned long long)drhd->reg_base_addr);
}
}
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 21f2ac639cab..061d1ee0046a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1832,7 +1832,7 @@ int pci_reset_function(struct pci_dev *dev)
if (!(cap & PCI_EXP_DEVCAP_FLR))
return -ENOTTY;
- if (!dev->msi_enabled && !dev->msix_enabled)
+ if (!dev->msi_enabled && !dev->msix_enabled && dev->irq != 0)
disable_irq(dev->irq);
pci_save_state(dev);
@@ -1841,7 +1841,7 @@ int pci_reset_function(struct pci_dev *dev)
r = pci_execute_reset_function(dev);
pci_restore_state(dev);
- if (!dev->msi_enabled && !dev->msix_enabled)
+ if (!dev->msi_enabled && !dev->msix_enabled && dev->irq != 0)
enable_irq(dev->irq);
return r;
@@ -2042,7 +2042,7 @@ static int __devinit pci_init(void)
return 0;
}
-static int __devinit pci_setup(char *str)
+static int __init pci_setup(char *str)
{
while (str) {
char *k = strchr(str, ',');
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5049a47030ac..5f4f85f56cb7 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -22,6 +22,7 @@
#include <linux/delay.h>
#include <linux/acpi.h>
#include <linux/kallsyms.h>
+#include <linux/dmi.h>
#include "pci.h"
int isa_dma_bridge_buggy;
@@ -1828,6 +1829,22 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS,
PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB,
ht_enable_msi_mapping);
+/* The P5N32-SLI Premium motherboard from Asus has a problem with msi
+ * for the MCP55 NIC. It is not yet determined whether the msi problem
+ * also affects other devices. As for now, turn off msi for this device.
+ */
+static void __devinit nvenet_msi_disable(struct pci_dev *dev)
+{
+ if (dmi_name_in_vendors("P5N32-SLI PREMIUM")) {
+ dev_info(&dev->dev,
+ "Disabling msi for MCP55 NIC on P5N32-SLI Premium\n");
+ dev->no_msi = 1;
+ }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
+ PCI_DEVICE_ID_NVIDIA_NVENET_15,
+ nvenet_msi_disable);
+
static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev)
{
struct pci_dev *host_bridge;