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authorBjorn Helgaas <bhelgaas@google.com>2023-10-28 21:31:05 +0300
committerBjorn Helgaas <bhelgaas@google.com>2023-10-28 21:31:05 +0300
commit50b3ef14c26b20476e67af582e788b17512023cf (patch)
tree795a400987446737fe26751c9c2fc2feaafb2a2e /drivers/pci/pcie
parent5897c174028a6a05169b6ecdbcd20fe4d1a8bcda (diff)
parent0fce6e5c87faec2c8bf28d2abc8cb595f4e244b6 (diff)
downloadlinux-50b3ef14c26b20476e67af582e788b17512023cf.tar.xz
Merge branch 'pci/misc'
- Prevent xHCI driver from claiming AMD VanGogh USB3 DRD device so dwc3 can claim it instead (Vicki Pfau) - Make pci_assign_unassigned_resources() non-init because sparc uses it after init-time (Randy Dunlap) - Remove logic_outb(), _outw(), outl() duplicate declarations (John Sanpe) - Remove unnecessary UTF-8 in Kconfig help text that confuses menuconfig (Liu Song) - Fix double free in __pci_epc_create() (Dan Carpenter) - Simplify pcie_capability_clear_and_set_word() cases that could be pcie_capability_clear_word() (Ilpo Järvinen) * pci/misc: PCI: Simplify pcie_capability_clear_and_set_word() to ..._clear_word() PCI: endpoint: Fix double free in __pci_epc_create() PCI: Replace unnecessary UTF-8 in Kconfig logic_pio: Remove logic_outb(), _outw(), outl() duplicate declarations PCI: Make pci_assign_unassigned_resources() non-init PCI: Prevent xHCI driver from claiming AMD VanGogh USB3 DRD device
Diffstat (limited to 'drivers/pci/pcie')
-rw-r--r--drivers/pci/pcie/aspm.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 99656d669f00..50b04ae5c394 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -696,10 +696,10 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
* in pcie_config_aspm_link().
*/
if (enable_req & (ASPM_STATE_L1_1 | ASPM_STATE_L1_2)) {
- pcie_capability_clear_and_set_word(child, PCI_EXP_LNKCTL,
- PCI_EXP_LNKCTL_ASPM_L1, 0);
- pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
- PCI_EXP_LNKCTL_ASPM_L1, 0);
+ pcie_capability_clear_word(child, PCI_EXP_LNKCTL,
+ PCI_EXP_LNKCTL_ASPM_L1);
+ pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
+ PCI_EXP_LNKCTL_ASPM_L1);
}
val = 0;