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authorDaniel Vetter <daniel.vetter@ffwll.ch>2016-06-02 10:54:12 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2016-06-02 10:54:12 +0300
commit5599617ec0719dba3b1f85a4abca2a6c93368ae3 (patch)
tree7d2f9bb6a538ee8ed5cfa391f2cfa72a3e2daa9f /drivers/pci/pcie/Kconfig
parent8d19d7d9dbc25d1a1ffa602ed9eff25a88c98163 (diff)
parent66fd7a66e8b9e11e49f46ea77910f935c4dee5c3 (diff)
downloadlinux-5599617ec0719dba3b1f85a4abca2a6c93368ae3.tar.xz
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
Git got absolutely destroyed with all our cherry-picking from drm-intel-next-queued to various branches. It ended up inserting intel_crtc_page_flip 2x even in intel_display.c. Backmerge to get back to sanity. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/pci/pcie/Kconfig')
-rw-r--r--drivers/pci/pcie/Kconfig14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index 72db7f4209ca..22ca6412bd15 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -81,3 +81,17 @@ endchoice
config PCIE_PME
def_bool y
depends on PCIEPORTBUS && PM
+
+config PCIE_DPC
+ tristate "PCIe Downstream Port Containment support"
+ depends on PCIEPORTBUS
+ default n
+ help
+ This enables PCI Express Downstream Port Containment (DPC)
+ driver support. DPC events from Root and Downstream ports
+ will be handled by the DPC driver. If your system doesn't
+ have this capability or you do not want to use this feature,
+ it is safe to answer N.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pcie-dpc.