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| author | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 16:55:52 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 16:55:52 +0300 |
| commit | 562df5c8521e1371f3cbd0b7b868034da376d714 (patch) | |
| tree | 798a5b2f688a60307889c632a20e32aae65d51fa /drivers/pci/host/pci-imx6.c | |
| parent | c334f9c89e40d2c9f4598e87e186bf3264d39e51 (diff) | |
| parent | 5a3aa2a8fae4ce1a3ad786d212b8fffca8ee72f5 (diff) | |
| download | linux-562df5c8521e1371f3cbd0b7b868034da376d714.tar.xz | |
Merge branch 'pci/host-designware' into next
* pci/host-designware:
PCI: designware: Add driver for prototyping kits based on ARC SDP
PCI: designware: Add default link up check if sub-driver doesn't override
PCI: designware: Add generic dw_pcie_wait_for_link()
ARC: Add PCI support
Diffstat (limited to 'drivers/pci/host/pci-imx6.c')
| -rw-r--r-- | drivers/pci/host/pci-imx6.c | 33 |
1 files changed, 7 insertions, 26 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index 8c9b3896d6f5..eb5a2755a164 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -357,33 +357,14 @@ static void imx6_pcie_init_phy(struct pcie_port *pp) static int imx6_pcie_wait_for_link(struct pcie_port *pp) { - unsigned int retries; + /* check if the link is up or not */ + if (!dw_pcie_wait_for_link(pp)) + return 0; - /* - * Test if the PHY reports that the link is up and also that the LTSSM - * training finished. There are three possible states of the link when - * this code is called: - * 1) The link is DOWN (unlikely) - * The link didn't come up yet for some reason. This usually means - * we have a real problem somewhere, if it happens with a peripheral - * connected. This state calls for inspection of the DEBUG registers. - * 2) The link is UP, but still in LTSSM training - * Wait for the training to finish, which should take a very short - * time. If the training does not finish, we have a problem and we - * need to inspect the DEBUG registers. If the training does finish, - * the link is up and operating correctly. - * 3) The link is UP and no longer in LTSSM training - * The link is up and operating correctly. - */ - for (retries = 0; retries < 200; retries++) { - u32 reg = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1); - if ((reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_UP) && - !(reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING)) - return 0; - usleep_range(1000, 2000); - } - - return -EINVAL; + dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", + readl(pp->dbi_base + PCIE_PHY_DEBUG_R0), + readl(pp->dbi_base + PCIE_PHY_DEBUG_R1)); + return -ETIMEDOUT; } static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp) |