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authorBjorn Helgaas <bhelgaas@google.com>2021-05-04 18:43:29 +0300
committerBjorn Helgaas <bhelgaas@google.com>2021-05-04 18:43:29 +0300
commit5b8dafa1e3b880decc2247397b8ae0882af0ba6e (patch)
treee9c4140dec540c7a1be5df820e475ebcd84e5228 /drivers/pci/controller/dwc
parent98d771eb3df23207d671a9efb1160c018ab8e492 (diff)
parent5859c926d1f052ee61b5815b14658875c14f6243 (diff)
downloadlinux-5b8dafa1e3b880decc2247397b8ae0882af0ba6e.tar.xz
Merge branch 'remotes/lorenzo/pci/tegra'
- Make several tegra symbols const (Rikard Falkeborn) - Fix tegra Kconfig host/endpoint typo (Wesley Sheng) - Fix runtime PM imbalance (Dinghao Liu) * remotes/lorenzo/pci/tegra: PCI: tegra: Fix runtime PM imbalance in pex_ep_event_pex_rst_deassert() PCI: tegra: Fix typo for PCIe endpoint mode in Tegra194 PCI: tegra: Constify static structs
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r--drivers/pci/controller/dwc/Kconfig2
-rw-r--r--drivers/pci/controller/dwc/pcie-tegra194.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index ecac22764559..423d35872ce4 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -280,7 +280,7 @@ config PCIE_TEGRA194_EP
select PCIE_TEGRA194
help
Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
- work in host mode. There are two instances of PCIe controllers in
+ work in endpoint mode. There are two instances of PCIe controllers in
Tegra194. This controller can work either as EP or RC. In order to
enable host-specific features PCIE_TEGRA194_HOST must be selected and
in order to enable device-specific features PCIE_TEGRA194_EP must be
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 6fa216e52d14..9b6799258fa4 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1019,7 +1019,7 @@ static const struct dw_pcie_ops tegra_dw_pcie_ops = {
.stop_link = tegra_pcie_dw_stop_link,
};
-static struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
+static const struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
.host_init = tegra_pcie_dw_host_init,
};
@@ -1645,7 +1645,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
if (pcie->ep_state == EP_STATE_ENABLED)
return;
- ret = pm_runtime_get_sync(dev);
+ ret = pm_runtime_resume_and_get(dev);
if (ret < 0) {
dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
ret);
@@ -1881,7 +1881,7 @@ tegra_pcie_ep_get_features(struct dw_pcie_ep *ep)
return &tegra_pcie_epc_features;
}
-static struct dw_pcie_ep_ops pcie_ep_ops = {
+static const struct dw_pcie_ep_ops pcie_ep_ops = {
.raise_irq = tegra_pcie_ep_raise_irq,
.get_features = tegra_pcie_ep_get_features,
};