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author | Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 20:59:18 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 20:59:18 +0300 |
commit | 51755de7398c596abbce6890ca6c62525f87d981 (patch) | |
tree | 375d606f91d5279348c1fc730c2146f45a6a6bee /drivers/pci/controller/dwc/pcie-designware-ep.c | |
parent | c521b7d5b8047ee7d1800cea003831fb790b5019 (diff) | |
parent | 56ad4a1b368a56d7b8f4613fabd90f63099b9bb2 (diff) | |
download | linux-51755de7398c596abbce6890ca6c62525f87d981.tar.xz |
Merge branch 'remotes/lorenzo/pci/rcar'
- Fix rcar OB window programming (Andrew Murray)
- Add rcar suspend/resume support (Kazufumi Ikeda)
- Add r8a77961 to DT binding (Yoshihiro Shimoda)
- Rename pcie-rcar.c to pcie-rcar-host.c to make room for endpoint mode
(Lad Prabhakar)
- Move shareable code to pcie-rcar.c (Lad Prabhakar)
- Correct PCIEPAMR mask calculation for "size < 128" (Lad Prabhakar)
- Add endpoint support for multiple outbound memory windows (Lad
Prabhakar)
- Add R-Car PCIe endpoint driver and DT bindings (Lad Prabhakar)
* remotes/lorenzo/pci/rcar:
MAINTAINERS: Add file patterns for rcar PCI device tree bindings
PCI: rcar: Add endpoint mode support
dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller
PCI: endpoint: Add support to handle multiple base for mapping outbound memory
PCI: endpoint: Pass page size as argument to pci_epc_mem_init()
PCI: rcar: Fix calculating mask for PCIEPAMR register
PCI: rcar: Move shareable code to a common file
PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c
dt-bindings: pci: rcar: add r8a77961 support
PCI: rcar: Add suspend/resume
PCI: rcar: Fix incorrect programming of OB windows
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-ep.c')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-ep.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index c815d36905b6..5e5b8821bed8 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -412,11 +412,11 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, reg = ep->msi_cap + PCI_MSI_DATA_32; msg_data = dw_pcie_readw_dbi(pci, reg); } - aligned_offset = msg_addr_lower & (epc->mem->page_size - 1); + aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); msg_addr = ((u64)msg_addr_upper) << 32 | (msg_addr_lower & ~aligned_offset); ret = dw_pcie_ep_map_addr(epc, func_no, ep->msi_mem_phys, msg_addr, - epc->mem->page_size); + epc->mem->window.page_size); if (ret) return ret; @@ -455,9 +455,9 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, return -EPERM; } - aligned_offset = msg_addr & (epc->mem->page_size - 1); + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); ret = dw_pcie_ep_map_addr(epc, func_no, ep->msi_mem_phys, msg_addr, - epc->mem->page_size); + epc->mem->window.page_size); if (ret) return ret; @@ -473,7 +473,7 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep) struct pci_epc *epc = ep->epc; pci_epc_mem_free_addr(epc, ep->msi_mem_phys, ep->msi_mem, - epc->mem->page_size); + epc->mem->window.page_size); pci_epc_mem_exit(epc); } @@ -606,15 +606,15 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) if (ret < 0) epc->max_functions = 1; - ret = __pci_epc_mem_init(epc, ep->phys_base, ep->addr_size, - ep->page_size); + ret = pci_epc_mem_init(epc, ep->phys_base, ep->addr_size, + ep->page_size); if (ret < 0) { dev_err(dev, "Failed to initialize address space\n"); return ret; } ep->msi_mem = pci_epc_mem_alloc_addr(epc, &ep->msi_mem_phys, - epc->mem->page_size); + epc->mem->window.page_size); if (!ep->msi_mem) { dev_err(dev, "Failed to reserve memory for MSI/MSI-X\n"); return -ENOMEM; |