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| author | Yurii Monakov <monakov.y@gmail.com> | 2019-10-04 18:48:11 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-01-10 20:25:47 +0300 |
| commit | 2d0c3fbe43fa0e6fcb7a6c755c5f4cd702c0d2f4 (patch) | |
| tree | 22eccf245d46cc2cb7f2aed7075a2103d77b1edf /drivers/pci/controller/dwc/pci-keystone.c | |
| parent | 6df19872d881641e6394f93ef2938cffcbdae5bb (diff) | |
| download | linux-2d0c3fbe43fa0e6fcb7a6c755c5f4cd702c0d2f4.tar.xz | |
PCI: keystone: Fix outbound region mapping
The Keystone outbound Address Translation Unit (ATU) maps PCI MMIO space in
8 MB windows. When programming the ATU windows, we previously incremented
the starting address by 8, not 8 MB, so all the windows were mapped to the
first 8 MB. Therefore, only 8 MB of MMIO space was accessible.
Update the loop so it increments the starting address by 8 MB, not 8, so
more MMIO space is accessible.
Fixes: e75043ad9792 ("PCI: keystone: Cleanup outbound window configuration")
Link: https://lore.kernel.org/r/20191004154811.GA31397@monakov-y.office.kontur-niirs.ru
Signed-off-by: Yurii Monakov <monakov.y@gmail.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: stable@vger.kernel.org # v4.20+
Diffstat (limited to 'drivers/pci/controller/dwc/pci-keystone.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pci-keystone.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index d4de4f6cff8b..ea8e7ebd8c4f 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -422,7 +422,7 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) lower_32_bits(start) | OB_ENABLEN); ks_pcie_app_writel(ks_pcie, OB_OFFSET_HI(i), upper_32_bits(start)); - start += OB_WIN_SIZE; + start += OB_WIN_SIZE * SZ_1M; } val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); |