diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2019-10-10 00:07:51 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-10-16 00:39:10 +0300 |
| commit | e5adf79a1d8086aefa56f48eeb08f8fe4e054a3d (patch) | |
| tree | f053b77ce7824bd10bd5f99127159eb81663b5b8 /drivers/pci/ats.c | |
| parent | 751035b8dc061ae434c3311bac9cd6d0e5e00f94 (diff) | |
| download | linux-e5adf79a1d8086aefa56f48eeb08f8fe4e054a3d.tar.xz | |
PCI/ATS: Cache PRI PRG Response PASID Required bit
The PRG Response PASID Required bit in the PRI Capability is read-only.
Read it once when we enumerate the device and cache the value so we don't
need to read it again.
Based-on-patch-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/ats.c')
| -rw-r--r-- | drivers/pci/ats.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index d5ac808cae21..76ae518d55f4 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -161,7 +161,16 @@ EXPORT_SYMBOL_GPL(pci_ats_page_aligned); #ifdef CONFIG_PCI_PRI void pci_pri_init(struct pci_dev *pdev) { + u16 status; + pdev->pri_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); + + if (!pdev->pri_cap) + return; + + pci_read_config_word(pdev, pdev->pri_cap + PCI_PRI_STATUS, &status); + if (status & PCI_PRI_STATUS_PASID) + pdev->pasid_required = 1; } /** @@ -301,22 +310,10 @@ EXPORT_SYMBOL_GPL(pci_reset_pri); */ int pci_prg_resp_pasid_required(struct pci_dev *pdev) { - u16 status; - int pri; - if (pdev->is_virtfn) pdev = pci_physfn(pdev); - pri = pdev->pri_cap; - if (!pri) - return 0; - - pci_read_config_word(pdev, pri + PCI_PRI_STATUS, &status); - - if (status & PCI_PRI_STATUS_PASID) - return 1; - - return 0; + return pdev->pasid_required; } EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); #endif /* CONFIG_PCI_PRI */ |