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author | Will Deacon <will.deacon@arm.com> | 2015-09-11 20:22:02 +0300 |
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committer | Will Deacon <will.deacon@arm.com> | 2015-09-14 14:28:45 +0300 |
commit | bf950040a53da35522e38066d9eb6ab7a1c9d136 (patch) | |
tree | c525e4411e969a2c070de72337a96c17775870f6 /drivers/nvmem | |
parent | 62d96c71d248834af2891293dc23cc344ae2ec36 (diff) | |
download | linux-bf950040a53da35522e38066d9eb6ab7a1c9d136.tar.xz |
arm64: pgtable: use a single bit for PTE_WRITE regardless of DBM
Depending on CONFIG_ARM64_HW_AFDBM, we use either bit 57 or 51 of the
pte to represent PTE_WRITE. Given that bit 51 is reserved prior to
ARMv8.1, we can just use that bit regardless of the config option. That
also matches what happens if a kernel configured with ARM64_HW_AFDBM=y
is run on a CPU without the DBM functionality.
Cc: Julien Grall <julien.grall@citrix.com>
Tested-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/nvmem')
0 files changed, 0 insertions, 0 deletions