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authorKalle Valo <kvalo@qca.qualcomm.com>2013-10-16 17:46:11 +0400
committerKalle Valo <kvalo@qca.qualcomm.com>2013-10-21 17:41:19 +0400
commit233eb97fc9d0f44f2ea99fe48118aa3d2dc25d64 (patch)
tree2c2c1d419f23cf4821ed09fb90cd962d22fa4e0f /drivers/net/wireless
parent5e90de860bc2d82dcb73caef86c05cb49c2b5792 (diff)
downloadlinux-233eb97fc9d0f44f2ea99fe48118aa3d2dc25d64.tar.xz
ath10k: implement ath10k_pci_soc_read/write32()
To make it easier to access SOC registers. No functional changes. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.c3
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.h10
2 files changed, 11 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index d09f8a2861ba..5c7838398e9a 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2454,8 +2454,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
return ret;
}
- chip_id = ath10k_pci_read32(ar,
- RTC_SOC_BASE_ADDRESS + SOC_CHIP_ID_ADDRESS);
+ chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
ath10k_do_pci_sleep(ar);
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index 52fb7b973571..a304c3384902 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -318,6 +318,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
return ioread32(ar_pci->mem + offset);
}
+static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
+{
+ return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
+}
+
+static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
+{
+ ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
+}
+
int ath10k_do_pci_wake(struct ath10k *ar);
void ath10k_do_pci_sleep(struct ath10k *ar);