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authorChien-Hsun Liao <ben.liao@realtek.com>2020-05-22 12:12:34 +0300
committerKalle Valo <kvalo@codeaurora.org>2020-05-29 20:37:10 +0300
commit7967af8de39d4572da2d15dfa12b1b08810d60a9 (patch)
tree8cba49b759f73e881fa9e6e315f700b5b7a89f53 /drivers/net/wireless/realtek
parent4e1a341580f2e51f7d1c992b50c28a6c4a242f7f (diff)
downloadlinux-7967af8de39d4572da2d15dfa12b1b08810d60a9.tar.xz
rtw88: 8822c: remove CCK TX setting when switch channel
The CCK TX setting when switch channel will fix the CCK to path A only, so if the antenna is configured to path B (e.g. iw phy set antenna 0x2 0x3 "TX B/RX AB"), then the CCK packets can never be delivered to the air if only path B is connected with an antenna (it can possibly be transmitted through path A, but as path B is configured, the expected behavior is incorrect). This can also solve the racing issue of CCK TX setting between driver and firmware. The CCK TX setting in driver should be removed. Otherwise, the CCK TX setting would be wrong when the racing occurs. Fixes: 297bcf8222f2 ("rtw88: add support for set/get antennas") Signed-off-by: Chien-Hsun Liao <ben.liao@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200522091234.24495-1-yhchuang@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek')
-rw-r--r--drivers/net/wireless/realtek/rtw88/rtw8822c.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c
index 8d65a9684af3..c3d72ef611c6 100644
--- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c
+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c
@@ -1496,7 +1496,6 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw,
{
if (IS_CH_2G_BAND(channel)) {
rtw_write32_clr(rtwdev, REG_BGCTRL, BITS_RX_IQ_WEIGHT);
- rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8);
rtw_write32_set(rtwdev, REG_TXF4, BIT(20));
rtw_write32_clr(rtwdev, REG_CCK_CHECK, BIT_CHECK_CCK_EN);
rtw_write32_clr(rtwdev, REG_CCKTXONLY, BIT_BB_CCK_CHECK_EN);
@@ -1564,7 +1563,6 @@ static void rtw8822c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw,
rtw_write32_set(rtwdev, REG_CCK_CHECK, BIT_CHECK_CCK_EN);
rtw_write32_set(rtwdev, REG_BGCTRL, BITS_RX_IQ_WEIGHT);
rtw_write32_clr(rtwdev, REG_TXF4, BIT(20));
- rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x0);
rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0x22);
rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3);
if (IS_CH_5G_BAND_1(channel) || IS_CH_5G_BAND_2(channel)) {