diff options
author | David S. Miller <davem@davemloft.net> | 2008-10-31 10:17:34 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2008-10-31 10:17:34 +0300 |
commit | a1744d3bee19d3b9cbfb825ab316a101b9c9f109 (patch) | |
tree | c0e2324c09beca0eb5782eb5abf241ea2b7a4a11 /drivers/net/wireless/ath5k/reset.c | |
parent | 275f165fa970174f8a98205529750e8abb6c0a33 (diff) | |
parent | a432226614c5616e3cfd211e0acffa0acfb4770c (diff) | |
download | linux-a1744d3bee19d3b9cbfb825ab316a101b9c9f109.tar.xz |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/wireless/p54/p54common.c
Diffstat (limited to 'drivers/net/wireless/ath5k/reset.c')
-rw-r--r-- | drivers/net/wireless/ath5k/reset.c | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/drivers/net/wireless/ath5k/reset.c b/drivers/net/wireless/ath5k/reset.c index 8f1886834e61..1b6d45b6772d 100644 --- a/drivers/net/wireless/ath5k/reset.c +++ b/drivers/net/wireless/ath5k/reset.c @@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, mdelay(1); /* - * Write some more initial register settings + * Write some more initial register settings for revised chips */ - if (ah->ah_version == AR5K_AR5212) { + if (ah->ah_version == AR5K_AR5212 && + ah->ah_phy_revision > 0x41) { ath5k_hw_reg_write(ah, 0x0002a002, 0x982c); if (channel->hw_value == CHANNEL_G) @@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, else ath5k_hw_reg_write(ah, 0x00000000, 0x994c); - /* Some bits are disabled here, we know nothing about - * register 0xa228 yet, most of the times this ends up - * with a value 0x9b5 -haven't seen any dump with - * a different value- */ - /* Got this from decompiling binary HAL */ - data = ath5k_hw_reg_read(ah, 0xa228); - data &= 0xfffffdff; - ath5k_hw_reg_write(ah, data, 0xa228); - - data = ath5k_hw_reg_read(ah, 0xa228); - data &= 0xfffe03ff; - ath5k_hw_reg_write(ah, data, 0xa228); - data = 0; + /* Got this from legacy-hal */ + AR5K_REG_DISABLE_BITS(ah, 0xa228, 0x200); + + AR5K_REG_MASKED_BITS(ah, 0xa228, 0x800, 0xfffe03ff); /* Just write 0x9b5 ? */ /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */ |