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authorMiaoqing Pan <miaoqing@codeaurora.org>2016-03-07 05:38:21 +0300
committerKalle Valo <kvalo@qca.qualcomm.com>2016-03-11 15:00:04 +0300
commitc7212b7136ba69efb9785df68b669381cb893920 (patch)
tree82ed53a90d3387ec54df198f93ee774439c1e7f6 /drivers/net/wireless/ath/ath9k/btcoex.h
parentdfcf02cd2998e2240b2bc7b4f4412578b8070bdb (diff)
downloadlinux-c7212b7136ba69efb9785df68b669381cb893920.tar.xz
ath9k: fix BTCoex configuration for SOC chips
Allow to set wl_active_time and wl_qc_time for SOC chips, also adjust bt_time_extend and bt_first_slot_time. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/btcoex.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.h b/drivers/net/wireless/ath/ath9k/btcoex.h
index 0f7c4e61ac13..1bdfa8465b92 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.h
+++ b/drivers/net/wireless/ath/ath9k/btcoex.h
@@ -115,6 +115,7 @@ struct ath_btcoex_hw {
u32 bt_coex_mode; /* Register setting for AR_BT_COEX_MODE */
u32 bt_coex_weights; /* Register setting for AR_BT_COEX_WEIGHT */
u32 bt_coex_mode2; /* Register setting for AR_BT_COEX_MODE2 */
+ u32 bt_coex_mode3; /* Register setting for AR_BT_COEX_MODE3 */
u32 bt_weight[AR9300_NUM_BT_WEIGHTS];
u32 wlan_weight[AR9300_NUM_WLAN_WEIGHTS];
u8 tx_prio[ATH_BTCOEX_STOMP_MAX];