diff options
| author | P Praneesh <ppranees@codeaurora.org> | 2021-11-12 12:01:26 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2021-11-15 12:21:49 +0300 |
| commit | 6452f0a3d5651bb7edfd9c709e78973aaa4d3bfc (patch) | |
| tree | 6202312e55fd60d9863718c35ab9d276dae3f6f9 /drivers/net/wireless/ath/ath11k/hw.h | |
| parent | 2c5545bfa29dd5305fa770959890a23ea39b5e69 (diff) | |
| download | linux-6452f0a3d5651bb7edfd9c709e78973aaa4d3bfc.tar.xz | |
ath11k: allocate dst ring descriptors from cacheable memory
tcl_data and reo_dst rings are currently being allocated using
dma_allocate_coherent() which is non cacheable.
Allocating ring memory from cacheable memory area allows cached descriptor
access and prefetch next descriptors to optimize CPU usage during
descriptor processing on NAPI. Based on the hardware param we can enable
or disable this feature for the corresponding platform.
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01695-QCAHKSWPL_SILICONZ-1
Co-developed-by: Pradeep Kumar Chitrapu <pradeepc@codeaurora.org>
Signed-off-by: Pradeep Kumar Chitrapu <pradeepc@codeaurora.org>
Co-developed-by: Sriram R <srirrama@codeaurora.org>
Signed-off-by: Sriram R <srirrama@codeaurora.org>
Signed-off-by: Jouni Malinen <jouni@codeaurora.org>
Signed-off-by: P Praneesh <ppranees@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/1630560820-21905-3-git-send-email-ppranees@codeaurora.org
Diffstat (limited to 'drivers/net/wireless/ath/ath11k/hw.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath11k/hw.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h index 2c7bd7a36ba5..3e64c9b94db0 100644 --- a/drivers/net/wireless/ath/ath11k/hw.h +++ b/drivers/net/wireless/ath/ath11k/hw.h @@ -178,6 +178,7 @@ struct ath11k_hw_params { u8 max_tx_ring; const struct ath11k_hw_hal_params *hal_params; bool supports_dynamic_smps_6ghz; + bool alloc_cacheable_memory; }; struct ath11k_hw_ops { |