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authorRakesh Pillai <pillair@codeaurora.org>2019-02-25 12:45:44 +0300
committerKalle Valo <kvalo@codeaurora.org>2019-02-26 15:56:19 +0300
commit02f73d3a9bdbdf070481118f7af0860e617f2aed (patch)
treeffd13f27e0e9a8762cbe21a5b722115cf196573a /drivers/net/wireless/ath/ath10k/ce.h
parentbd16693f359bbab8776541c06a6df32f3996638e (diff)
downloadlinux-02f73d3a9bdbdf070481118f7af0860e617f2aed.tar.xz
ath10k: fix descriptor size in ce tx completion for WCN3990
When the driver receives the tx completion of the descriptor over ce, it clears the nbytes configured for that particular descriptor. WCN3990 uses ce descriptors with 64-bit address. Currently during handling the tx completion of the descriptors, the nbytes are accessed from the descriptors using ce_desc for 32-bit targets. This will lead to clearing of memory at incorrect offset if DMA MASK is set to greater than 32 bits. Attach different ce tx copy completed handler for targets using address above 32-bit address. Tested HW: WCN3990 Tested FW: WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/ce.h')
-rw-r--r--drivers/net/wireless/ath/ath10k/ce.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath10k/ce.h b/drivers/net/wireless/ath/ath10k/ce.h
index 692b3a8957a9..a7478c240f78 100644
--- a/drivers/net/wireless/ath/ath10k/ce.h
+++ b/drivers/net/wireless/ath/ath10k/ce.h
@@ -329,6 +329,8 @@ struct ath10k_ce_ops {
void (*ce_set_dest_ring_base_addr_hi)(struct ath10k *ar,
u32 ce_ctrl_addr,
u64 addr);
+ int (*ce_completed_send_next_nolock)(struct ath10k_ce_pipe *ce_state,
+ void **per_transfer_contextp);
};
static inline u32 ath10k_ce_base_address(struct ath10k *ar, unsigned int ce_id)