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authorBruce Allan <bruce.w.allan@intel.com>2010-11-24 09:01:41 +0300
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2010-12-11 09:13:27 +0300
commitce54afd16d874ac07378a8bb55d26f7f5b613c0e (patch)
treeabad7c3150c4acbf3012168d71d611523459694a /drivers/net/typhoon.c
parentd9c76f99c2a79feb413e3e751362d59c0f5323f6 (diff)
downloadlinux-ce54afd16d874ac07378a8bb55d26f7f5b613c0e.tar.xz
e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx
The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits) were being configured incorrectly when device goes to D3 state. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/typhoon.c')
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