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authorMatt Carlson <mcarlson@broadcom.com>2010-01-12 13:11:38 +0300
committerDavid S. Miller <davem@davemloft.net>2010-01-14 04:18:53 +0300
commitd1ec96af77df611d1728f3bb70289f83a02df1ea (patch)
treeb6268f532c7d40272da4149f27518afa0dd2191b /drivers/net/tg3.c
parent86cfe4ff02a51294cb2c974a8bedc7f648491df9 (diff)
downloadlinux-d1ec96af77df611d1728f3bb70289f83a02df1ea.tar.xz
tg3: Add reliable serdes detection for 5717 A0
The serdes status bit does not work as intended for the 5717 A0. This patch implements an alternative detection scheme that will only be valid for A0 revisions. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4e8b87d1ffa9..0a632f96d16b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1037,7 +1037,11 @@ static void tg3_mdio_start(struct tg3 *tp)
else
tp->phy_addr = 1;
- is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
+ if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0)
+ is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
+ else
+ is_serdes = tr32(TG3_CPMU_PHY_STRAP) &
+ TG3_CPMU_PHY_STRAP_IS_SERDES;
if (is_serdes)
tp->phy_addr += 7;
} else
@@ -12123,7 +12127,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
tp->phy_id = eeprom_phy_id;
if (eeprom_phy_serdes) {
- if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
+ if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
else
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;