diff options
| author | Paolo Abeni <pabeni@redhat.com> | 2024-06-18 14:28:29 +0300 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-06-18 14:28:29 +0300 |
| commit | e845bb84fb6ec57f979cfba40e794c6e8b249585 (patch) | |
| tree | e953c6aa5f1360f29ea51f3da3e0acb4195ba03c /drivers/net/phy/phylink.c | |
| parent | 041cc86b3653cbcdf6ab96c2f2ae34f3d0a99b0a (diff) | |
| parent | 5dfabcdd76b1455c5378abbcb2e68285cf7eb554 (diff) | |
| download | linux-e845bb84fb6ec57f979cfba40e794c6e8b249585.tar.xz | |
Merge branch 'introduce-phy-mode-10g-qxgmii'
Luo Jie says:
====================
Introduce PHY mode 10G-QXGMII
This patch series adds 10G-QXGMII mode for PHY driver. The patch
series is split from the QCA8084 PHY driver patch series below.
https://lore.kernel.org/all/20231215074005.26976-1-quic_luoj@quicinc.com/
Per Andrew Lunn’s advice, submitting this patch series for acceptance
as they already include the necessary 'Reviewed-by:' tags. This way,
they need not wait for QCA8084 series patches to conclude review.
Changes in v2:
* remove PHY_INTERFACE_MODE_10G_QXGMII from workaround of
validation in the phylink_validate_phy. 10G_QXGMII will
be set into phy->possible_interfaces in its .config_init
method of PHY driver that supports it.
====================
Link: https://lore.kernel.org/r/20240615120028.2384732-1-quic_luoj@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers/net/phy/phylink.c')
| -rw-r--r-- | drivers/net/phy/phylink.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 02427378acfd..6c24c48dcf0f 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -231,6 +231,7 @@ static int phylink_interface_max_speed(phy_interface_t interface) return SPEED_1000; case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_10G_QXGMII: return SPEED_2500; case PHY_INTERFACE_MODE_5GBASER: @@ -500,7 +501,11 @@ static unsigned long phylink_get_capabilities(phy_interface_t interface, switch (interface) { case PHY_INTERFACE_MODE_USXGMII: - caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; + caps |= MAC_10000FD | MAC_5000FD; + fallthrough; + + case PHY_INTERFACE_MODE_10G_QXGMII: + caps |= MAC_2500FD; fallthrough; case PHY_INTERFACE_MODE_RGMII_TXID: @@ -926,6 +931,7 @@ static int phylink_parse_mode(struct phylink *pl, case PHY_INTERFACE_MODE_5GBASER: case PHY_INTERFACE_MODE_25GBASER: case PHY_INTERFACE_MODE_USXGMII: + case PHY_INTERFACE_MODE_10G_QXGMII: case PHY_INTERFACE_MODE_10GKR: case PHY_INTERFACE_MODE_10GBASER: case PHY_INTERFACE_MODE_XLGMII: @@ -1124,6 +1130,7 @@ static unsigned int phylink_pcs_neg_mode(unsigned int mode, case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_QUSGMII: case PHY_INTERFACE_MODE_USXGMII: + case PHY_INTERFACE_MODE_10G_QXGMII: /* These protocols are designed for use with a PHY which * communicates its negotiation result back to the MAC via * inband communication. Note: there exist PHYs that run |