diff options
author | Eli Cohen <eli@mellanox.co.il> | 2010-10-21 23:39:08 +0400 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2010-10-25 21:20:39 +0400 |
commit | 7ac870ed7d2316587ec06747c28cb9f44f67997d (patch) | |
tree | 61de0d5744ef60798745842885b3afdd9ecf88ac /drivers/net/mlx4 | |
parent | 96dfa684c85d24b697f865f37a4f0c8678fc86e9 (diff) | |
download | linux-7ac870ed7d2316587ec06747c28cb9f44f67997d.tar.xz |
mlx4_en: Change multicast promiscuous mode to support IBoE
Change multicast promiscuous mode to pass packets through the multicast group distribution table
before sending packets that miss to the default multicast QP.
Signed-off-by: Eli Cohen <eli@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4')
-rw-r--r-- | drivers/net/mlx4/en_port.c | 4 | ||||
-rw-r--r-- | drivers/net/mlx4/en_port.h | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/net/mlx4/en_port.c b/drivers/net/mlx4/en_port.c index a29abe845d2e..a24988799e01 100644 --- a/drivers/net/mlx4/en_port.c +++ b/drivers/net/mlx4/en_port.c @@ -127,8 +127,8 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, memset(context, 0, sizeof *context); context->base_qpn = cpu_to_be32(base_qpn); - context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | base_qpn); - context->mcast = cpu_to_be32(1 << SET_PORT_PROMISC_SHIFT | base_qpn); + context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_EN_SHIFT | base_qpn); + context->mcast = cpu_to_be32(1 << SET_PORT_PROMISC_MODE_SHIFT | base_qpn); context->intra_no_vlan = 0; context->no_vlan = MLX4_NO_VLAN_IDX; context->intra_vlan_miss = 0; diff --git a/drivers/net/mlx4/en_port.h b/drivers/net/mlx4/en_port.h index e6477f12beb5..935489120400 100644 --- a/drivers/net/mlx4/en_port.h +++ b/drivers/net/mlx4/en_port.h @@ -36,7 +36,8 @@ #define SET_PORT_GEN_ALL_VALID 0x7 -#define SET_PORT_PROMISC_SHIFT 31 +#define SET_PORT_PROMISC_EN_SHIFT 31 +#define SET_PORT_PROMISC_MODE_SHIFT 30 enum { MLX4_CMD_SET_VLAN_FLTR = 0x47, |