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authorAlexander Duyck <alexander.h.duyck@intel.com>2009-07-23 22:08:35 +0400
committerDavid S. Miller <davem@davemloft.net>2009-07-26 20:46:49 +0400
commit009bc06e5311b48c77b7708d9e226ae0f110373a (patch)
treefceeade485befdbda8047d14bb59c9c0b0b0dad8 /drivers/net/igb/e1000_regs.h
parent12645a196eccb9209f88915f56a686086dea1a16 (diff)
downloadlinux-009bc06e5311b48c77b7708d9e226ae0f110373a.tar.xz
igb: add completion timeout workaround for 82575/82576
The 82575 and 82576 hardware can both experience data corruption issues if a pci-e completion arrives after the timeout value. In order to avoid this we need to increase the timeout value while pci-e master is disabled. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_regs.h')
-rw-r--r--drivers/net/igb/e1000_regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h
index 6e5924511e40..345d1442d6d6 100644
--- a/drivers/net/igb/e1000_regs.h
+++ b/drivers/net/igb/e1000_regs.h
@@ -305,6 +305,7 @@ enum {
#define E1000_CCMCTL 0x05B48 /* CCM Control Register */
#define E1000_GIOCTL 0x05B44 /* GIO Analog Control Register */
#define E1000_SCCTL 0x05B4C /* PCIc PLL Configuration Register */
+#define E1000_GCR 0x05B00 /* PCI-Ex Control */
#define E1000_FACTPS 0x05B30 /* Function Active and Power State to MNG */
#define E1000_SWSM 0x05B50 /* SW Semaphore */
#define E1000_FWSM 0x05B54 /* FW Semaphore */