diff options
| author | Wong Vee Khee <vee.khee.wong@linux.intel.com> | 2022-07-14 10:54:27 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-07-18 13:14:35 +0300 |
| commit | 76c16d3e19446deea98b7883f261758b96b8781a (patch) | |
| tree | f5b09a47646973bb384a1086ba86a5319222b579 /drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | |
| parent | 11052589cf5c0bab3b4884d423d5f60c38fcf25d (diff) | |
| download | linux-76c16d3e19446deea98b7883f261758b96b8781a.tar.xz | |
net: stmmac: switch to use interrupt for hw crosstimestamping
Using current implementation of polling mode, there is high chances we
will hit into timeout error when running phc2sys. Hence, update the
implementation of hardware crosstimestamping to use the MAC interrupt
service routine instead of polling for TSIS bit in the MAC Timestamp
Interrupt Status register to be set.
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index fd41db65fe1d..d5299dd13e85 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -23,6 +23,7 @@ static void dwmac4_core_init(struct mac_device_info *hw, struct net_device *dev) { + struct stmmac_priv *priv = netdev_priv(dev); void __iomem *ioaddr = hw->pcsr; u32 value = readl(ioaddr + GMAC_CONFIG); @@ -58,6 +59,9 @@ static void dwmac4_core_init(struct mac_device_info *hw, value |= GMAC_INT_FPE_EN; writel(value, ioaddr + GMAC_INT_EN); + + if (GMAC_INT_DEFAULT_ENABLE & GMAC_INT_TSIE) + init_waitqueue_head(&priv->tstamp_busy_wait); } static void dwmac4_rx_queue_enable(struct mac_device_info *hw, |